From 1a3b3b845b55c391650219cb0889c5eaae947f0e Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 4 Jul 2024 17:42:56 +0200 Subject: [PATCH] radv: simplify determining when a VS prolog is needed Only if a VS is compiled without the vertex input state. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_pipeline_graphics.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 7ba9d8d0be1..f9b2cd91ff8 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1708,8 +1708,7 @@ radv_generate_graphics_state_key(const struct radv_device *device, const struct } /* Compile the pre-rasterization stages only when the vertex input interface is missing. */ - if ((lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_PRE_RASTERIZATION_SHADERS_BIT_EXT) && - !(lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_VERTEX_INPUT_INTERFACE_BIT_EXT)) { + if ((state->shader_stages && VK_SHADER_STAGE_VERTEX_BIT) && !state->vi) { key.vs.has_prolog = true; }