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gallium/radeon: remove RADEON_FLUSH_KEEP_TILING_FLAGS flag

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-07-15 01:15:42 +02:00
parent 0b626d7524
commit 1a1cc67edd
5 changed files with 4 additions and 16 deletions
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2
src/gallium/drivers/r300/r300_flush.c
View file

@ -78,8 +78,6 @@ void r300_flush(struct pipe_context *pipe,
{
struct r300_context *r300 = r300_context(pipe);
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
if (r300->dirty_hw) {
r300_flush_and_cleanup(r300, flags, fence);
} else {

3
src/gallium/drivers/r600/r600_hw_context.c
View file

@ -274,9 +274,6 @@ void r600_context_gfx_flush(void *context, unsigned flags,
radeon_set_context_reg(cs, R_028350_SX_MISC, 0);
}
/* force to keep tiling flags */
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
/* Flush the CS. */
ctx->b.ws->cs_flush(cs, flags, fence);

3
src/gallium/drivers/radeon/radeon_winsys.h
View file

@ -29,8 +29,7 @@
#include "pipebuffer/pb_buffer.h"
#define RADEON_FLUSH_ASYNC (1 << 0)
#define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1)
#define RADEON_FLUSH_END_OF_FRAME (1 << 2)
#define RADEON_FLUSH_END_OF_FRAME (1 << 1)
/* Tiling flags. */
enum radeon_bo_layout {

3
src/gallium/drivers/radeonsi/si_hw_context.c
View file

@ -123,9 +123,6 @@ void si_context_gfx_flush(void *context, unsigned flags,
si_emit_cache_flush(ctx, NULL);
/* force to keep tiling flags */
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
if (ctx->trace_buf)
si_trace_emit(ctx);

9
src/gallium/winsys/radeon/drm/radeon_drm_cs.c
View file

@ -563,13 +563,10 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
default:
case RING_GFX:
case RING_COMPUTE:
cs->cst->flags[0] = 0;
cs->cst->flags[0] = RADEON_CS_KEEP_TILING_FLAGS;
cs->cst->flags[1] = RADEON_CS_RING_GFX;
cs->cst->cs.num_chunks = 2;
if (flags & RADEON_FLUSH_KEEP_TILING_FLAGS) {
cs->cst->flags[0] |= RADEON_CS_KEEP_TILING_FLAGS;
cs->cst->cs.num_chunks = 3;
}
cs->cst->cs.num_chunks = 3;
if (cs->ws->info.has_virtual_memory) {
cs->cst->flags[0] |= RADEON_CS_USE_VM;
cs->cst->cs.num_chunks = 3;