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anv: Fill PAT fields in Xe KMD gem_create and vm_bind uAPIs

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Unlike i915, Xe KMD needs the cache parameter in gem_create
then during vm bind it request the PAT index that matches previous
parameter.
The PAT index selected could have more memory caracteristics that KMD
don't need to know.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25462>
This commit is contained in:
José Roberto de Souza 2023-09-20 13:02:46 -07:00 • committed by Marge Bot
parent 99ae565af2
commit 1a0d3504d5
1 changed files with 15 additions and 0 deletions
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15
src/intel/vulkan/xe/anv_kmd_backend.c
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@ -65,6 +65,20 @@ xe_gem_create(struct anv_device *device,
for (uint16_t i = 0; i < regions_count; i++) for (uint16_t i = 0; i < regions_count; i++)
gem_create.flags |= BITFIELD_BIT(regions[i]->instance); gem_create.flags |= BITFIELD_BIT(regions[i]->instance);
const struct intel_device_info_pat_entry *pat_entry =
anv_device_get_pat_entry(device, alloc_flags);
switch (pat_entry->mmap) {
case INTEL_DEVICE_INFO_MMAP_MODE_WC:
gem_create.cpu_caching = DRM_XE_GEM_CPU_CACHING_WC;
break;
case INTEL_DEVICE_INFO_MMAP_MODE_WB:
gem_create.cpu_caching = DRM_XE_GEM_CPU_CACHING_WB;
break;
default:
unreachable("missing");
gem_create.cpu_caching = DRM_XE_GEM_CPU_CACHING_WC;
}
if (intel_ioctl(device->fd, DRM_IOCTL_XE_GEM_CREATE, &gem_create)) if (intel_ioctl(device->fd, DRM_IOCTL_XE_GEM_CREATE, &gem_create))
return 0; return 0;
@ -137,6 +151,7 @@ xe_vm_bind_op(struct anv_device *device,
.op = DRM_XE_VM_BIND_OP_UNMAP, .op = DRM_XE_VM_BIND_OP_UNMAP,
.flags = 0, .flags = 0,
.prefetch_mem_region_instance = 0, .prefetch_mem_region_instance = 0,
.pat_index = anv_device_get_pat_entry(device, bo->alloc_flags)->index,
}; };
if (bind->op == ANV_VM_BIND) { if (bind->op == ANV_VM_BIND) {