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radeonsi: decompress to flushed depth texture when required
v2: s/dirty_level_mask/stencil_dirty_level_mask/ in stencil case Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle
parent
4b7961da77
commit
1a0a8efcce
1 changed files with 103 additions and 29 deletions
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@ -101,7 +101,7 @@ static unsigned u_max_sample(struct pipe_resource *r)
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return r->nr_samples ? r->nr_samples - 1 : 0;
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}
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static void
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static unsigned
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si_blit_dbcb_copy(struct si_context *sctx,
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struct r600_texture *src,
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struct r600_texture *dst,
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@ -111,6 +111,7 @@ si_blit_dbcb_copy(struct si_context *sctx,
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{
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struct pipe_surface surf_tmpl = {{0}};
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unsigned layer, sample, checked_last_layer, max_layer;
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unsigned fully_copied_levels = 0;
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if (planes & PIPE_MASK_Z)
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sctx->dbcb_depth_copy_enabled = true;
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@ -157,11 +158,17 @@ si_blit_dbcb_copy(struct si_context *sctx,
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pipe_surface_reference(&zsurf, NULL);
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pipe_surface_reference(&cbsurf, NULL);
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}
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if (first_layer == 0 && last_layer >= max_layer &&
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first_sample == 0 && last_sample >= u_max_sample(&src->resource.b.b))
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fully_copied_levels |= 1u << level;
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}
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sctx->dbcb_depth_copy_enabled = false;
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sctx->dbcb_stencil_copy_enabled = false;
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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return fully_copied_levels;
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}
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static void si_blit_decompress_depth(struct pipe_context *ctx,
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@ -254,51 +261,118 @@ si_blit_decompress_zs_planes_in_place(struct si_context *sctx,
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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}
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/* Decompress Z and/or S planes in place, depending on mask.
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/* Helper function of si_flush_depth_texture: decompress the given levels
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* of Z and/or S planes in place.
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*/
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static void
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si_blit_decompress_zs_in_place(struct si_context *sctx,
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struct r600_texture *texture,
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unsigned planes,
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unsigned first_level, unsigned last_level,
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unsigned levels_z, unsigned levels_s,
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unsigned first_layer, unsigned last_layer)
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{
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unsigned level_mask =
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u_bit_consecutive(first_level, last_level - first_level + 1);
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unsigned cur_level_mask;
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unsigned both = levels_z & levels_s;
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/* First, do combined Z & S decompresses for levels that need it. */
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if (planes == (PIPE_MASK_Z | PIPE_MASK_S)) {
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cur_level_mask =
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level_mask &
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texture->dirty_level_mask &
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texture->stencil_dirty_level_mask;
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if (both) {
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si_blit_decompress_zs_planes_in_place(
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sctx, texture, PIPE_MASK_Z | PIPE_MASK_S,
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cur_level_mask,
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both,
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first_layer, last_layer);
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level_mask &= ~cur_level_mask;
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levels_z &= ~both;
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levels_s &= ~both;
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}
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/* Now do separate Z and S decompresses. */
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if (planes & PIPE_MASK_Z) {
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cur_level_mask = level_mask & texture->dirty_level_mask;
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if (levels_z) {
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si_blit_decompress_zs_planes_in_place(
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sctx, texture, PIPE_MASK_Z,
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cur_level_mask,
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levels_z,
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first_layer, last_layer);
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level_mask &= ~cur_level_mask;
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}
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if (planes & PIPE_MASK_S) {
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cur_level_mask = level_mask & texture->stencil_dirty_level_mask;
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if (levels_s) {
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si_blit_decompress_zs_planes_in_place(
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sctx, texture, PIPE_MASK_S,
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cur_level_mask,
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levels_s,
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first_layer, last_layer);
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}
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}
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static void
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si_flush_depth_texture(struct si_context *sctx,
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struct r600_texture *tex,
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unsigned required_planes,
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unsigned first_level, unsigned last_level,
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unsigned first_layer, unsigned last_layer)
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{
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unsigned inplace_planes = 0;
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unsigned copy_planes = 0;
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unsigned level_mask = u_bit_consecutive(first_level, last_level - first_level + 1);
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unsigned levels_z = 0;
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unsigned levels_s = 0;
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if (required_planes & PIPE_MASK_Z) {
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levels_z = level_mask & tex->dirty_level_mask;
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if (levels_z) {
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if (r600_can_sample_zs(tex, false))
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inplace_planes |= PIPE_MASK_Z;
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else
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copy_planes |= PIPE_MASK_Z;
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}
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}
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if (required_planes & PIPE_MASK_S) {
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levels_s = level_mask & tex->stencil_dirty_level_mask;
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if (levels_s) {
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if (r600_can_sample_zs(tex, true))
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inplace_planes |= PIPE_MASK_S;
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else
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copy_planes |= PIPE_MASK_S;
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}
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}
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/* We may have to allocate the flushed texture here when called from
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* si_decompress_subresource.
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*/
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if (copy_planes &&
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(tex->flushed_depth_texture ||
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r600_init_flushed_depth_texture(&sctx->b.b, &tex->resource.b.b, NULL))) {
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struct r600_texture *dst = tex->flushed_depth_texture;
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unsigned fully_copied_levels;
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unsigned levels = 0;
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if (util_format_is_depth_and_stencil(dst->resource.b.b.format))
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copy_planes = PIPE_MASK_Z | PIPE_MASK_S;
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if (copy_planes & PIPE_MASK_Z) {
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levels |= levels_z;
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levels_z = 0;
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}
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if (copy_planes & PIPE_MASK_S) {
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levels |= levels_s;
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levels_s = 0;
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}
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fully_copied_levels = si_blit_dbcb_copy(
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sctx, tex, dst, copy_planes, levels,
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first_layer, last_layer,
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0, u_max_sample(&tex->resource.b.b));
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if (copy_planes & PIPE_MASK_Z)
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tex->dirty_level_mask &= ~fully_copied_levels;
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if (copy_planes & PIPE_MASK_S)
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tex->stencil_dirty_level_mask &= ~fully_copied_levels;
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}
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if (inplace_planes) {
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si_blit_decompress_zs_in_place(
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sctx, tex,
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levels_z, levels_s,
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first_layer, last_layer);
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}
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}
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static void
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si_flush_depth_textures(struct si_context *sctx,
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struct si_textures_info *textures)
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@ -320,11 +394,11 @@ si_flush_depth_textures(struct si_context *sctx,
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tex = (struct r600_texture *)view->texture;
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assert(tex->db_compatible);
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si_blit_decompress_zs_in_place(sctx, tex,
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sview->is_stencil_sampler ? PIPE_MASK_S
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: PIPE_MASK_Z,
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view->u.tex.first_level, view->u.tex.last_level,
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0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
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si_flush_depth_texture(
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sctx, tex,
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sview->is_stencil_sampler ? PIPE_MASK_S : PIPE_MASK_Z,
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view->u.tex.first_level, view->u.tex.last_level,
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0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
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}
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}
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@ -727,9 +801,9 @@ static void si_decompress_subresource(struct pipe_context *ctx,
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if (!(rtex->surface.flags & RADEON_SURF_SBUFFER))
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planes &= ~PIPE_MASK_S;
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si_blit_decompress_zs_in_place(sctx, rtex, planes,
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level, level,
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first_layer, last_layer);
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si_flush_depth_texture(sctx, rtex, planes,
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level, level,
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first_layer, last_layer);
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} else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) {
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si_blit_decompress_color(ctx, rtex, level, level,
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first_layer, last_layer, false);
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