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radeonsi/gfx11: program db render control register

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Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
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Yogesh mohan marimuthu 2021-12-22 20:13:25 +05:30 • committed by Marge Bot
parent 9fecac091f
commit 19a59f05a4
1 changed files with 25 additions and 0 deletions
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25
src/gallium/drivers/radeonsi/si_state.c
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@ -1512,6 +1512,31 @@ static void si_emit_db_render_state(struct si_context *sctx)
S_028000_STENCIL_CLEAR_ENABLE(sctx->db_stencil_clear); S_028000_STENCIL_CLEAR_ENABLE(sctx->db_stencil_clear);
} }
if (sctx->chip_class >= GFX11) {
unsigned max_allowed_tiles_in_wave = 0;
if (sctx->screen->info.has_dedicated_vram) {
if (sctx->framebuffer.nr_samples == 8)
max_allowed_tiles_in_wave = 7;
else if (sctx->framebuffer.nr_samples == 4)
max_allowed_tiles_in_wave = 14;
} else {
if (sctx->framebuffer.nr_samples == 8)
max_allowed_tiles_in_wave = 8;
}
/* TODO: We may want to disable this workaround for future chips. */
if (sctx->framebuffer.nr_samples >= 4) {
if (max_allowed_tiles_in_wave)
max_allowed_tiles_in_wave--;
else
max_allowed_tiles_in_wave = 15;
}
db_render_control |= S_028000_OREO_MODE(V_028000_OMODE_O_THEN_B) |
S_028000_MAX_ALLOWED_TILES_IN_WAVE(max_allowed_tiles_in_wave);
}
/* DB_COUNT_CONTROL (occlusion queries) */ /* DB_COUNT_CONTROL (occlusion queries) */
if (sctx->num_occlusion_queries > 0 && !sctx->occlusion_queries_disabled) { if (sctx->num_occlusion_queries > 0 && !sctx->occlusion_queries_disabled) {
bool perfect = sctx->num_perfect_occlusion_queries > 0; bool perfect = sctx->num_perfect_occlusion_queries > 0;