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cell: Initial code-gen for alpha / stencil / depth testing
Alpha test is currently broken because all per-fragment testing occurs before alpha is calculated. Stencil test is currently broken because the Z-clear code asserts if there is a stencil buffer.
This commit is contained in:
parent
0c715de39f
commit
1936e4bdfd
15 changed files with 1409 additions and 170 deletions
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@ -104,6 +104,16 @@
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/**
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*/
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struct cell_command_depth_stencil_alpha_test {
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uint64_t base; /**< Effective address of code start. */
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unsigned size; /**< Size in bytes of test code. */
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unsigned read_depth; /**< Flag: should depth be read? */
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unsigned read_stencil; /**< Flag: should stencil be read? */
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};
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/**
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* Tell SPUs about the framebuffer size, location
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*/
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@ -27,6 +27,7 @@ SOURCES = \
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cell_flush.c \
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cell_state_derived.c \
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cell_state_emit.c \
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cell_state_per_fragment.c \
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cell_state_shader.c \
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cell_pipe_state.c \
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cell_screen.c \
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@ -57,16 +57,37 @@ struct cell_fragment_shader_state
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};
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struct cell_blend_state {
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struct pipe_blend_state base;
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/**
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* Generated code to perform alpha blending
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*/
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struct spe_function code;
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};
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struct cell_depth_stencil_alpha_state {
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struct pipe_depth_stencil_alpha_state base;
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/**
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* Generated code to perform alpha, stencil, and depth testing on the SPE
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*/
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struct spe_function code;
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};
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struct cell_context
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{
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struct pipe_context pipe;
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struct cell_winsys *winsys;
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const struct pipe_blend_state *blend;
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const struct cell_blend_state *blend;
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const struct pipe_sampler_state *sampler[PIPE_MAX_SAMPLERS];
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uint num_samplers;
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const struct pipe_depth_stencil_alpha_state *depth_stencil;
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const struct cell_depth_stencil_alpha_state *depth_stencil;
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const struct pipe_rasterizer_state *rasterizer;
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const struct cell_vertex_shader_state *vs;
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const struct cell_fragment_shader_state *fs;
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@ -36,6 +36,7 @@
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#include "cell_context.h"
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#include "cell_state.h"
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#include "cell_texture.h"
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#include "cell_state_per_fragment.h"
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@ -43,7 +44,12 @@ static void *
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cell_create_blend_state(struct pipe_context *pipe,
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const struct pipe_blend_state *blend)
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{
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return mem_dup(blend, sizeof(*blend));
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struct cell_blend_state *cb = MALLOC(sizeof(struct cell_blend_state));
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(void) memcpy(cb, blend, sizeof(*blend));
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cb->code.store = NULL;
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return cb;
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}
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@ -54,7 +60,7 @@ cell_bind_blend_state(struct pipe_context *pipe, void *blend)
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draw_flush(cell->draw);
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cell->blend = (const struct pipe_blend_state *)blend;
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cell->blend = (const struct cell_blend_state *)blend;
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cell->dirty |= CELL_NEW_BLEND;
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}
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@ -63,7 +69,10 @@ cell_bind_blend_state(struct pipe_context *pipe, void *blend)
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static void
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cell_delete_blend_state(struct pipe_context *pipe, void *blend)
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{
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FREE(blend);
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struct cell_blend_state *cb = (struct cell_blend_state *) blend;
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spe_release_func(& cb->code);
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FREE(cb);
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}
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@ -87,7 +96,13 @@ static void *
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cell_create_depth_stencil_alpha_state(struct pipe_context *pipe,
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const struct pipe_depth_stencil_alpha_state *depth_stencil)
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{
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return mem_dup(depth_stencil, sizeof(*depth_stencil));
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struct cell_depth_stencil_alpha_state *cdsa =
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MALLOC(sizeof(struct cell_depth_stencil_alpha_state));
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(void) memcpy(cdsa, depth_stencil, sizeof(*depth_stencil));
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cdsa->code.store = NULL;
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return cdsa;
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}
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@ -96,12 +111,16 @@ cell_bind_depth_stencil_alpha_state(struct pipe_context *pipe,
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void *depth_stencil)
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{
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struct cell_context *cell = cell_context(pipe);
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struct cell_depth_stencil_alpha_state *cdsa =
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(struct cell_depth_stencil_alpha_state *) depth_stencil;
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draw_flush(cell->draw);
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cell->depth_stencil
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= (const struct pipe_depth_stencil_alpha_state *) depth_stencil;
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if (cdsa->code.store == NULL) {
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cell_generate_depth_stencil_test(cdsa);
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}
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cell->depth_stencil = cdsa;
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cell->dirty |= CELL_NEW_DEPTH_STENCIL;
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}
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@ -109,7 +128,11 @@ cell_bind_depth_stencil_alpha_state(struct pipe_context *pipe,
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static void
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cell_delete_depth_stencil_alpha_state(struct pipe_context *pipe, void *depth)
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{
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FREE(depth);
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struct cell_depth_stencil_alpha_state *cdsa =
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(struct cell_depth_stencil_alpha_state *) depth;
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spe_release_func(& cdsa->code);
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FREE(cdsa);
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}
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@ -71,9 +71,27 @@ cell_emit_state(struct cell_context *cell)
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}
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if (cell->dirty & CELL_NEW_DEPTH_STENCIL) {
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emit_state_cmd(cell, CELL_CMD_STATE_DEPTH_STENCIL,
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cell->depth_stencil,
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sizeof(struct pipe_depth_stencil_alpha_state));
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struct cell_command_depth_stencil_alpha_test dsat;
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dsat.base = (intptr_t) cell->depth_stencil->code.store;
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dsat.size = (char *) cell->depth_stencil->code.csr
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- (char *) cell->depth_stencil->code.store;
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dsat.read_depth = TRUE;
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dsat.read_stencil = FALSE;
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{
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uint32_t *p = cell->depth_stencil->code.store;
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printf("\t.text\n");
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for (/* empty */; p < cell->depth_stencil->code.csr; p++) {
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printf("\t.long\t0x%04x\n", *p);
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}
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fflush(stdout);
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}
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emit_state_cmd(cell, CELL_CMD_STATE_DEPTH_STENCIL, &dsat,
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sizeof(dsat));
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}
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if (cell->dirty & CELL_NEW_SAMPLER) {
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1020
src/gallium/drivers/cell/ppu/cell_state_per_fragment.c
Normal file
1020
src/gallium/drivers/cell/ppu/cell_state_per_fragment.c
Normal file
File diff suppressed because it is too large
Load diff
35
src/gallium/drivers/cell/ppu/cell_state_per_fragment.h
Normal file
35
src/gallium/drivers/cell/ppu/cell_state_per_fragment.h
Normal file
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@ -0,0 +1,35 @@
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/*
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* (C) Copyright IBM Corporation 2008
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef CELL_STATE_PER_FRAGMENT_H
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#define CELL_STATE_PER_FRAGMENT_H
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extern void
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cell_generate_depth_stencil_test(struct cell_depth_stencil_alpha_state *cdsa);
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extern void
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cell_generate_alpha_blend(struct cell_blend_state *cb,
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const struct pipe_blend_color *blend_color);
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#endif /* CELL_STATE_PER_FRAGMENT_H */
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@ -19,6 +19,7 @@ SOURCES = \
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spu_main.c \
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spu_blend.c \
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spu_dcache.c \
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spu_per_fragment_op.c \
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spu_render.c \
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spu_texture.c \
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spu_tile.c \
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@ -58,6 +58,9 @@ struct spu_vs_context draw;
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static unsigned char attribute_fetch_code_buffer[136 * PIPE_ATTRIB_MAX]
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ALIGN16_ATTRIB;
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static unsigned char depth_stencil_code_buffer[4 * 64]
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ALIGN16_ATTRIB;
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/**
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* Tell the PPU that this SPU has finished copying a buffer to
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* local store and that it may be reused by the PPU.
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@ -248,14 +251,26 @@ cmd_state_blend(const struct pipe_blend_state *state)
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static void
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cmd_state_depth_stencil(const struct pipe_depth_stencil_alpha_state *state)
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cmd_state_depth_stencil(const struct cell_command_depth_stencil_alpha_test *state)
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{
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if (Debug)
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printf("SPU %u: DEPTH_STENCIL: ztest %d\n",
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spu.init.id,
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state->depth.enabled);
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state->read_depth);
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memcpy(&spu.depth_stencil, state, sizeof(*state));
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ASSERT_ALIGN16(state->base);
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mfc_get(depth_stencil_code_buffer,
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(unsigned int) state->base, /* src */
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ROUNDUP16(state->size),
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TAG_BATCH_BUFFER,
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0, /* tid */
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0 /* rid */);
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wait_on_mask(1 << TAG_BATCH_BUFFER);
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spu.frag_test = (frag_test_func) depth_stencil_code_buffer;
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spu.read_depth = state->read_depth;
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spu.read_stencil = state->read_stencil;
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}
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@ -415,9 +430,9 @@ cmd_batch(uint opcode)
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pos += (1 + ROUNDUP8(sizeof(struct pipe_blend_state)) / 8);
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break;
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case CELL_CMD_STATE_DEPTH_STENCIL:
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cmd_state_depth_stencil((struct pipe_depth_stencil_alpha_state *)
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cmd_state_depth_stencil((struct cell_command_depth_stencil_alpha_test *)
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&buffer[pos+1]);
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pos += (1 + ROUNDUP8(sizeof(struct pipe_depth_stencil_alpha_state)) / 8);
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pos += (1 + ROUNDUP8(sizeof(struct cell_command_depth_stencil_alpha_test)) / 8);
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break;
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case CELL_CMD_STATE_SAMPLER:
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cmd_state_sampler((struct pipe_sampler_state *) &buffer[pos+1]);
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@ -56,6 +56,17 @@ typedef union {
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#define TILE_STATUS_GETTING 5 /**< mfc_get() called but not yet arrived */
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struct spu_frag_test_results {
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qword mask;
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qword depth;
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qword stencil;
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};
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typedef struct spu_frag_test_results (*frag_test_func)(qword frag_mask,
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qword pixel_depth, qword pixel_stencil, qword frag_depth,
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qword frag_alpha, qword facing);
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struct spu_framebuffer {
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void *color_start; /**< addr of color surface in main memory */
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void *depth_start; /**< addr of depth surface in main memory */
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@ -79,8 +90,9 @@ struct spu_global
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struct cell_init_info init;
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struct spu_framebuffer fb;
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struct pipe_blend_state blend_stencil;
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struct pipe_depth_stencil_alpha_state depth_stencil;
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boolean read_depth;
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boolean read_stencil;
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frag_test_func frag_test;
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struct pipe_blend_state blend;
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struct pipe_sampler_state sampler[PIPE_MAX_SAMPLERS];
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struct cell_command_texture texture;
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191
src/gallium/drivers/cell/spu/spu_per_fragment_op.c
Normal file
191
src/gallium/drivers/cell/spu/spu_per_fragment_op.c
Normal file
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@ -0,0 +1,191 @@
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/*
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* (C) Copyright IBM Corporation 2008
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/**
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* \file spu_per_fragment_op.c
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* SPU implementation various per-fragment operations.
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*
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* \author Ian Romanick <idr@us.ibm.com>
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*/
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#include "pipe/p_format.h"
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#include "spu_main.h"
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#include "spu_per_fragment_op.h"
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#define ZERO 0x80
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static void
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read_ds_quad(tile_t *buffer, unsigned x, unsigned y,
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enum pipe_format depth_format, qword *depth,
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qword *stencil)
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{
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const int ix = x / 2;
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const int iy = y / 2;
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switch (depth_format) {
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case PIPE_FORMAT_Z16_UNORM: {
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qword *ptr = (qword *) &buffer->us8[iy][ix / 2];
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const qword shuf_vec = (qword) {
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ZERO, ZERO, 0, 1, ZERO, ZERO, 2, 3,
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ZERO, ZERO, 4, 5, ZERO, ZERO, 6, 7
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};
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/* At even X values we want the first 4 shorts, and at odd X values we
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* want the second 4 shorts.
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*/
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qword bias = (qword) spu_splats((unsigned char) ((ix & 0x01) << 3));
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qword bias_mask = si_fsmbi(0x3333);
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qword sv = si_a(shuf_vec, si_and(bias_mask, bias));
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*depth = si_shufb(*ptr, *ptr, sv);
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*stencil = si_il(0);
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break;
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}
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case PIPE_FORMAT_Z32_UNORM: {
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qword *ptr = (qword *) &buffer->ui4[iy][ix];
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*depth = *ptr;
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*stencil = si_il(0);
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break;
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}
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case PIPE_FORMAT_Z24S8_UNORM: {
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qword *ptr = (qword *) &buffer->ui4[iy][ix];
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qword mask = si_fsmbi(0x7777);
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*depth = si_and(*ptr, mask);
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*stencil = si_rotmai(si_andc(*ptr, mask), -24);
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break;
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}
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default:
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assert(0);
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break;
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}
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}
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static void
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write_ds_quad(tile_t *buffer, unsigned x, unsigned y,
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enum pipe_format depth_format,
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qword depth, qword stencil)
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{
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const int ix = x / 2;
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const int iy = y / 2;
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(void) stencil;
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switch (depth_format) {
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case PIPE_FORMAT_Z16_UNORM: {
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qword *ptr = (qword *) &buffer->us8[iy][ix / 2];
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qword sv = ((ix & 0x01) == 0)
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? (qword) { 2, 3, 6, 7, 10, 11, 14, 15,
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24, 25, 26, 27, 28, 29, 30, 31 }
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: (qword) { 16, 17, 18, 19, 20 , 21, 22, 23,
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2, 3, 6, 7, 10, 11, 14, 15 };
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*ptr = si_shufb(depth, *ptr, sv);
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break;
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}
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case PIPE_FORMAT_Z32_UNORM: {
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qword *ptr = (qword *) &buffer->ui4[iy][ix];
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*ptr = depth;
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break;
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}
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case PIPE_FORMAT_Z24S8_UNORM: {
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qword *ptr = (qword *) &buffer->ui4[iy][ix];
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qword mask = si_fsmbi(0x7777);
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|
||||
stencil = si_rotmai(stencil, 24);
|
||||
*ptr = si_selb(stencil, depth, mask);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
default:
|
||||
assert(0);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
qword
|
||||
spu_do_depth_stencil(int x, int y,
|
||||
qword frag_mask, qword frag_depth, qword frag_alpha,
|
||||
qword facing)
|
||||
{
|
||||
struct spu_frag_test_results result;
|
||||
qword pixel_depth;
|
||||
qword pixel_stencil;
|
||||
|
||||
/* All of this preable code (everthing before the call to frag_test) should
|
||||
* be generated on the PPU and upload to the SPU.
|
||||
*/
|
||||
if (spu.read_depth || spu.read_stencil) {
|
||||
read_ds_quad(&spu.ztile, x, y, spu.fb.depth_format,
|
||||
&pixel_depth, &pixel_stencil);
|
||||
}
|
||||
|
||||
switch (spu.fb.depth_format) {
|
||||
case PIPE_FORMAT_Z16_UNORM:
|
||||
frag_depth = si_fm(frag_depth, (qword)spu_splats((float)(0x0000ffffu)));
|
||||
frag_depth = si_cfltu(frag_depth, 0);
|
||||
break;
|
||||
case PIPE_FORMAT_Z32_UNORM:
|
||||
frag_depth = si_fm(frag_depth, (qword)spu_splats((float)(0xffffffffu)));
|
||||
frag_depth = si_cfltu(frag_depth, 0);
|
||||
break;
|
||||
case PIPE_FORMAT_Z24S8_UNORM:
|
||||
frag_depth = si_fm(frag_depth, (qword)spu_splats((float)(0x00ffffffu)));
|
||||
frag_depth = si_cfltu(frag_depth, 0);
|
||||
break;
|
||||
default:
|
||||
assert(0);
|
||||
break;
|
||||
}
|
||||
|
||||
result = (*spu.frag_test)(frag_mask, pixel_depth, pixel_stencil,
|
||||
frag_depth, frag_alpha, facing);
|
||||
|
||||
|
||||
/* This code (everthing after the call to frag_test) should
|
||||
* be generated on the PPU and upload to the SPU.
|
||||
*/
|
||||
if (spu.read_depth || spu.read_stencil) {
|
||||
write_ds_quad(&spu.ztile, x, y, spu.fb.depth_format,
|
||||
result.depth, result.stencil);
|
||||
}
|
||||
|
||||
return result.mask;
|
||||
}
|
||||
32
src/gallium/drivers/cell/spu/spu_per_fragment_op.h
Normal file
32
src/gallium/drivers/cell/spu/spu_per_fragment_op.h
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
* (C) Copyright IBM Corporation 2008
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* on the rights to use, copy, modify, merge, publish, distribute, sub
|
||||
* license, and/or sell copies of the Software, and to permit persons to whom
|
||||
* the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef SPU_PER_FRAGMENT_OP
|
||||
#define SPU_PER_FRAGMENT_OP
|
||||
|
||||
extern qword
|
||||
spu_do_depth_stencil(int x, int y, qword frag_mask, qword frag_depth,
|
||||
qword frag_alpha, qword facing);
|
||||
|
||||
#endif /* SPU_PER_FRAGMENT_OP */
|
||||
|
|
@ -98,7 +98,7 @@ my_tile(uint tx, uint ty)
|
|||
static INLINE void
|
||||
get_cz_tiles(uint tx, uint ty)
|
||||
{
|
||||
if (spu.depth_stencil.depth.enabled) {
|
||||
if (spu.read_depth) {
|
||||
if (spu.cur_ztile_status != TILE_STATUS_CLEAR) {
|
||||
//printf("SPU %u: getting Z tile %u, %u\n", spu.init.id, tx, ty);
|
||||
get_tile(tx, ty, &spu.ztile, TAG_READ_TILE_Z, 1);
|
||||
|
|
@ -153,7 +153,7 @@ static INLINE void
|
|||
wait_put_cz_tiles(void)
|
||||
{
|
||||
wait_on_mask(1 << TAG_WRITE_TILE_COLOR);
|
||||
if (spu.depth_stencil.depth.enabled) {
|
||||
if (spu.read_depth) {
|
||||
wait_on_mask(1 << TAG_WRITE_TILE_Z);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -38,8 +38,7 @@
|
|||
#include "spu_texture.h"
|
||||
#include "spu_tile.h"
|
||||
#include "spu_tri.h"
|
||||
|
||||
#include "spu_ztest.h"
|
||||
#include "spu_per_fragment_op.h"
|
||||
|
||||
|
||||
/** Masks are uint[4] vectors with each element being 0 or 0xffffffff */
|
||||
|
|
@ -264,16 +263,12 @@ do_depth_test(int x, int y, mask_t quadmask)
|
|||
|
||||
zvals.v = eval_z((float) x, (float) y);
|
||||
|
||||
if (spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM) {
|
||||
int ix = (x - setup.cliprect_minx) / 4;
|
||||
int iy = (y - setup.cliprect_miny) / 2;
|
||||
mask = spu_z16_test_less(zvals.v, &spu.ztile.us8[iy][ix], x>>1, quadmask);
|
||||
}
|
||||
else {
|
||||
int ix = (x - setup.cliprect_minx) / 2;
|
||||
int iy = (y - setup.cliprect_miny) / 2;
|
||||
mask = spu_z32_test_less(zvals.v, &spu.ztile.ui4[iy][ix], quadmask);
|
||||
}
|
||||
mask = (mask_t) spu_do_depth_stencil(x - setup.cliprect_minx,
|
||||
y - setup.cliprect_miny,
|
||||
(qword) quadmask,
|
||||
(qword) zvals.v,
|
||||
(qword) spu_splats((unsigned char) 0x0ffu),
|
||||
(qword) spu_splats((unsigned int) 0x01u));
|
||||
|
||||
if (spu_extract(spu_orx(mask), 0))
|
||||
spu.cur_ztile_status = TILE_STATUS_DIRTY;
|
||||
|
|
@ -299,7 +294,7 @@ emit_quad( int x, int y, mask_t mask )
|
|||
sp->quad.first->run(sp->quad.first, &setup.quad);
|
||||
#else
|
||||
|
||||
if (spu.depth_stencil.depth.enabled) {
|
||||
if (spu.read_depth) {
|
||||
mask = do_depth_test(x, y, mask);
|
||||
}
|
||||
|
||||
|
|
@ -434,7 +429,7 @@ static void flush_spans( void )
|
|||
}
|
||||
ASSERT(spu.cur_ctile_status != TILE_STATUS_DEFINED);
|
||||
|
||||
if (spu.depth_stencil.depth.enabled) {
|
||||
if (spu.read_depth) {
|
||||
if (spu.cur_ztile_status == TILE_STATUS_GETTING) {
|
||||
/* wait for mfc_get() to complete */
|
||||
//printf("SPU: %u: waiting for ztile\n", spu.init.id);
|
||||
|
|
|
|||
|
|
@ -1,135 +0,0 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
|
||||
/**
|
||||
* Zbuffer/depth test code.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef SPU_ZTEST_H
|
||||
#define SPU_ZTEST_H
|
||||
|
||||
|
||||
#ifdef __SPU__
|
||||
#include <spu_intrinsics.h>
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* Perform Z testing for a 16-bit/value Z buffer.
|
||||
*
|
||||
* \param zvals vector of four fragment zvalues as floats
|
||||
* \param zbuf ptr to vector of ushort[8] zbuffer values. Note that this
|
||||
* contains the Z values for 2 quads, 8 pixels.
|
||||
* \param x x coordinate of quad (only lsbit is significant)
|
||||
* \param inMask indicates which fragments in the quad are alive
|
||||
* \return new mask indicating which fragments are alive after ztest
|
||||
*/
|
||||
static INLINE vector unsigned int
|
||||
spu_z16_test_less(vector float zvals, vector unsigned short *zbuf,
|
||||
uint x, vector unsigned int inMask)
|
||||
{
|
||||
#define ZERO 0x80
|
||||
vector unsigned int zvals_ui4, zbuf_ui4, mask;
|
||||
|
||||
/* convert floats to uints in [0, 65535] */
|
||||
zvals_ui4 = spu_convtu(zvals, 32); /* convert to [0, 2^32] */
|
||||
zvals_ui4 = spu_rlmask(zvals_ui4, -16); /* right shift 16 */
|
||||
|
||||
/* XXX this conditional could be removed with a bit of work */
|
||||
if (x & 1) {
|
||||
/* convert zbuffer values from ushorts to uints */
|
||||
/* gather lower four ushorts */
|
||||
zbuf_ui4 = spu_shuffle((vector unsigned int) *zbuf,
|
||||
(vector unsigned int) *zbuf,
|
||||
((vector unsigned char) {
|
||||
ZERO, ZERO, 8, 9, ZERO, ZERO, 10, 11,
|
||||
ZERO, ZERO, 12, 13, ZERO, ZERO, 14, 15}));
|
||||
/* mask = (zbuf_ui4 < zvals_ui4) ? ~0 : 0 */
|
||||
mask = spu_cmpgt(zbuf_ui4, zvals_ui4);
|
||||
/* mask &= inMask */
|
||||
mask = spu_and(mask, inMask);
|
||||
/* zbuf = mask ? zval : zbuf */
|
||||
zbuf_ui4 = spu_sel(zbuf_ui4, zvals_ui4, mask);
|
||||
/* convert zbuffer values from uints back to ushorts, preserve lower 4 */
|
||||
*zbuf = (vector unsigned short)
|
||||
spu_shuffle(zbuf_ui4, (vector unsigned int) *zbuf,
|
||||
((vector unsigned char) {
|
||||
16, 17, 18, 19, 20, 21, 22, 23,
|
||||
2, 3, 6, 7, 10, 11, 14, 15}));
|
||||
}
|
||||
else {
|
||||
/* convert zbuffer values from ushorts to uints */
|
||||
/* gather upper four ushorts */
|
||||
zbuf_ui4 = spu_shuffle((vector unsigned int) *zbuf,
|
||||
(vector unsigned int) *zbuf,
|
||||
((vector unsigned char) {
|
||||
ZERO, ZERO, 0, 1, ZERO, ZERO, 2, 3,
|
||||
ZERO, ZERO, 4, 5, ZERO, ZERO, 6, 7}));
|
||||
/* mask = (zbuf_ui4 < zvals_ui4) ? ~0 : 0 */
|
||||
mask = spu_cmpgt(zbuf_ui4, zvals_ui4);
|
||||
/* mask &= inMask */
|
||||
mask = spu_and(mask, inMask);
|
||||
/* zbuf = mask ? zval : zbuf */
|
||||
zbuf_ui4 = spu_sel(zbuf_ui4, zvals_ui4, mask);
|
||||
/* convert zbuffer values from uints back to ushorts, preserve upper 4 */
|
||||
*zbuf = (vector unsigned short)
|
||||
spu_shuffle(zbuf_ui4, (vector unsigned int) *zbuf,
|
||||
((vector unsigned char) {
|
||||
2, 3, 6, 7, 10, 11, 14, 15,
|
||||
24, 25, 26, 27, 28, 29, 30, 31}));
|
||||
}
|
||||
return mask;
|
||||
#undef ZERO
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* As above, but Zbuffer values as 32-bit uints
|
||||
*/
|
||||
static INLINE vector unsigned int
|
||||
spu_z32_test_less(vector float zvals, vector unsigned int *zbuf_ptr,
|
||||
vector unsigned int inMask)
|
||||
{
|
||||
vector unsigned int zvals_ui4, mask, zbuf = *zbuf_ptr;
|
||||
|
||||
/* convert floats to uints in [0, 0xffffffff] */
|
||||
zvals_ui4 = spu_convtu(zvals, 32);
|
||||
/* mask = (zbuf < zvals_ui4) ? ~0 : 0 */
|
||||
mask = spu_cmpgt(zbuf, zvals_ui4);
|
||||
/* mask &= inMask */
|
||||
mask = spu_and(mask, inMask);
|
||||
/* zbuf = mask ? zval : zbuf */
|
||||
*zbuf_ptr = spu_sel(zbuf, zvals_ui4, mask);
|
||||
|
||||
return mask;
|
||||
}
|
||||
|
||||
|
||||
#endif /* SPU_ZTEST_H */
|
||||
Loading…
Add table
Reference in a new issue