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nvc0: finish implementation of PIPE_QUERY_SO_OVERFLOW_PREDICATE

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This also removes some useless code leftover from old changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Rhys Perry 2018-04-05 22:49:52 +01:00 • committed by Ilia Mirkin
parent 14cc8c55ea
commit 19254a977b
5 changed files with 32 additions and 18 deletions
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2
docs/features.txt
View file

@ -232,7 +232,7 @@ GL 4.6, GLSL 4.60
GL_ARB_shader_group_vote DONE (i965, nvc0, radeonsi)
GL_ARB_spirv_extensions in progress (Nicolai Hähnle, Ian Romanick)
GL_ARB_texture_filter_anisotropic DONE (freedreno, i965, nv50, nvc0, r600, radeonsi, softpipe (*), llvmpipe (*))
GL_ARB_transform_feedback_overflow_query DONE (i965/gen6+, radeonsi, llvmpipe, softpipe)
GL_ARB_transform_feedback_overflow_query DONE (i965/gen6+, nvc0, radeonsi, llvmpipe, softpipe)
GL_KHR_no_error DONE (all drivers)
(*) softpipe and llvmpipe advertise 16x anisotropy but simply ignore the setting

1
docs/relnotes/18.1.0.html
View file

@ -46,6 +46,7 @@ Note: some of the new features are only available with certain drivers.
<ul>
<li>OpenGL 3.1 with ARB_compatibility on nv50, nvc0, r600, radeonsi, softpipe, llvmpipe, svga</li>
<li>GL_ARB_bindless_texture on nvc0/maxwell+</li>
<li>GL_ARB_transform_feedback_overflow_query on nvc0</li>
<li>GL_EXT_semaphore on radeonsi</li>
<li>GL_EXT_semaphore_fd on radeonsi</li>
<li>GL_EXT_shader_framebuffer_fetch on i965 on desktop GL (GLES was already supported)</li>

3
src/gallium/drivers/nouveau/nvc0/nvc0_query.c
View file

@ -113,8 +113,9 @@ nvc0_render_condition(struct pipe_context *pipe,
/* NOTE: comparison of 2 queries only works if both have completed */
switch (q->type) {
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
cond = condition ? NVC0_3D_COND_MODE_EQUAL :
NVC0_3D_COND_MODE_NOT_EQUAL;
NVC0_3D_COND_MODE_NOT_EQUAL;
wait = true;
break;
case PIPE_QUERY_OCCLUSION_COUNTER:

42
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
View file

@ -181,6 +181,10 @@ nvc0_hw_begin_query(struct nvc0_context *nvc0, struct nvc0_query *q)
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
nvc0_hw_query_get(push, q, 0x10, 0x03005002 | (q->index << 5));
break;
case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
/* XXX: This get actually writes the number of overflowed streams */
nvc0_hw_query_get(push, q, 0x10, 0x0f005002);
break;
case PIPE_QUERY_TIME_ELAPSED:
nvc0_hw_query_get(push, q, 0x10, 0x00005002);
break;
@ -243,10 +247,11 @@ nvc0_hw_end_query(struct nvc0_context *nvc0, struct nvc0_query *q)
nvc0_hw_query_get(push, q, 0x10, 0x06805002 | (q->index << 5));
break;
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
/* TODO: How do we sum over all streams for render condition ? */
/* PRIMS_DROPPED doesn't write sequence, use a ZERO query to sync on */
nvc0_hw_query_get(push, q, 0x00, 0x03005002 | (q->index << 5));
nvc0_hw_query_get(push, q, 0x20, 0x00005002);
break;
case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
/* XXX: This get actually writes the number of overflowed streams */
nvc0_hw_query_get(push, q, 0x00, 0x0f005002);
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
@ -334,6 +339,7 @@ nvc0_hw_get_query_result(struct nvc0_context *nvc0, struct nvc0_query *q,
res64[1] = data64[2] - data64[6];
break;
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
res8[0] = data64[0] != data64[2];
break;
case PIPE_QUERY_TIMESTAMP:
@ -417,15 +423,22 @@ nvc0_hw_get_query_result_resource(struct nvc0_context *nvc0,
PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
BEGIN_1IC0(push, NVC0_3D(MACRO_QUERY_BUFFER_WRITE), 9);
if (q->type == PIPE_QUERY_OCCLUSION_PREDICATE ||
q->type == PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE) /* XXX what if 64-bit? */
switch (q->type) {
case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: /* XXX what if 64-bit? */
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
PUSH_DATA(push, 0x00000001);
else if (result_type == PIPE_QUERY_TYPE_I32)
PUSH_DATA(push, 0x7fffffff);
else if (result_type == PIPE_QUERY_TYPE_U32)
PUSH_DATA(push, 0xffffffff);
else
PUSH_DATA(push, 0x00000000);
break;
default:
if (result_type == PIPE_QUERY_TYPE_I32)
PUSH_DATA(push, 0x7fffffff);
else if (result_type == PIPE_QUERY_TYPE_U32)
PUSH_DATA(push, 0xffffffff);
else
PUSH_DATA(push, 0x00000000);
break;
}
switch (q->type) {
case PIPE_QUERY_SO_STATISTICS:
@ -519,6 +532,7 @@ nvc0_hw_create_query(struct nvc0_context *nvc0, unsigned type, unsigned index)
q = &hq->base;
q->funcs = &hw_query_funcs;
q->type = type;
q->index = index;
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
@ -532,14 +546,14 @@ nvc0_hw_create_query(struct nvc0_context *nvc0, unsigned type, unsigned index)
space = 512;
break;
case PIPE_QUERY_SO_STATISTICS:
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
hq->is64bit = true;
space = 64;
break;
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
case PIPE_QUERY_PRIMITIVES_GENERATED:
case PIPE_QUERY_PRIMITIVES_EMITTED:
hq->is64bit = true;
q->index = index;
space = 32;
break;
case PIPE_QUERY_TIME_ELAPSED:
@ -615,8 +629,6 @@ nvc0_hw_query_fifo_wait(struct nvc0_context *nvc0, struct nvc0_query *q)
if (hq->is64bit && hq->fence->state < NOUVEAU_FENCE_STATE_EMITTED)
nouveau_fence_emit(hq->fence);
if (q->type == PIPE_QUERY_SO_OVERFLOW_PREDICATE) offset += 0x20;
PUSH_SPACE(push, 5);
PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
BEGIN_NVC0(push, SUBC_3D(NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH), 4);

2
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -254,6 +254,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_COMPUTE:
case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
case PIPE_CAP_QUERY_SO_OVERFLOW:
return 1;
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
@ -298,7 +299,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_INT64_DIVMOD:
case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
case PIPE_CAP_QUERY_SO_OVERFLOW:
case PIPE_CAP_MEMOBJ:
case PIPE_CAP_LOAD_CONSTBUF:
case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS: