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nv50/ir: add CCTL (cache control) op

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This commit is contained in:
Christoph Bumiller 2013-03-11 17:34:05 +01:00
parent 9db7e09cb4
commit 18fdfbdc32
5 changed files with 33 additions and 4 deletions
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3
src/gallium/drivers/nv50/codegen/nv50_ir.h
View file

@ -153,6 +153,7 @@ enum operation
OP_VSHR,
OP_VSHL,
OP_VSEL,
OP_CCTL, // cache control
OP_LAST
};
@ -199,6 +200,8 @@ enum operation
#define NV50_IR_SUBOP_ATOM_XOR 7
#define NV50_IR_SUBOP_ATOM_CAS 8
#define NV50_IR_SUBOP_ATOM_EXCH 9
#define NV50_IR_SUBOP_CCTL_IV 5
#define NV50_IR_SUBOP_CCTL_IVALL 6
#define NV50_IR_SUBOP_SUST_IGN 0
#define NV50_IR_SUBOP_SUST_TRAP 1
#define NV50_IR_SUBOP_SUST_SDCL 3

2
src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
View file

@ -1791,7 +1791,7 @@ MemoryOpt::runOpt(BasicBlock *bb)
purgeRecords(NULL, FILE_MEMORY_SHARED);
purgeRecords(NULL, FILE_SHADER_OUTPUT);
} else
if (ldst->op == OP_ATOM) {
if (ldst->op == OP_ATOM || ldst->op == OP_CCTL) {
if (ldst->src(0).getFile() == FILE_MEMORY_GLOBAL) {
purgeRecords(NULL, FILE_MEMORY_LOCAL);
purgeRecords(NULL, FILE_MEMORY_GLOBAL);

1
src/gallium/drivers/nv50/codegen/nv50_ir_print.cpp
View file

@ -183,6 +183,7 @@ const char *operationStr[OP_LAST + 1] =
"vshr",
"vshl",
"vsel",
"cctl",
"(invalid)"
};

6
src/gallium/drivers/nv50/codegen/nv50_ir_target.cpp
View file

@ -53,7 +53,7 @@ const uint8_t Target::operationSrcNr[OP_LAST + 1] =
2, 3, 2, 3, // POPCNT, INSBF, EXTBF, PERMT
2, 2, // ATOM, BAR
2, 2, 2, 2, 3, 2, // VADD, VAVG, VMIN, VMAX, VSAD, VSET,
2, 2, 2, // VSHR, VSHL, VSEL
2, 2, 2, 1, // VSHR, VSHL, VSEL, CCTL
0
};
@ -123,8 +123,8 @@ const OpClass Target::operationClass[OP_LAST + 1] =
OPCLASS_VECTOR, OPCLASS_VECTOR, OPCLASS_VECTOR, OPCLASS_VECTOR,
// VSAD, VSET, VSHR, VSHL
OPCLASS_VECTOR, OPCLASS_VECTOR, OPCLASS_VECTOR, OPCLASS_VECTOR,
// VSEL
OPCLASS_VECTOR,
// VSEL, CCTL
OPCLASS_VECTOR, OPCLASS_CONTROL,
OPCLASS_PSEUDO // LAST
};

25
src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
View file

@ -82,6 +82,7 @@ private:
void emitMOV(const Instruction *);
void emitATOM(const Instruction *);
void emitMEMBAR(const Instruction *);
void emitCCTL(const Instruction *);
void emitINTERP(const Instruction *);
void emitPFETCH(const Instruction *);
@ -1885,6 +1886,27 @@ CodeEmitterNVC0::emitMEMBAR(const Instruction *i)
emitPredicate(i);
}
void
CodeEmitterNVC0::emitCCTL(const Instruction *i)
{
code[0] = 0x00000005 | (i->subOp << 5);
if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
code[1] = 0x98000000;
srcAddr32(i->src(0), 28, 2);
} else {
code[1] = 0xd0000000;
setAddress24(i->src(0));
}
if (uses64bitAddress(i))
code[1] |= 1 << 26;
srcId(i->src(0).getIndirect(0), 20);
emitPredicate(i);
defId(i, 0, 14);
}
void
CodeEmitterNVC0::emitSUCLAMPMode(uint16_t subOp)
{
@ -2348,6 +2370,9 @@ CodeEmitterNVC0::emitInstruction(Instruction *insn)
case OP_MEMBAR:
emitMEMBAR(insn);
break;
case OP_CCTL:
emitCCTL(insn);
break;
case OP_VSHL:
emitVSHL(insn);
break;