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intel/brw/xe2+: Update encoding of FB write descriptor message control.

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Ref: bspec: 65209, 63908
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28306>
This commit is contained in:
Francisco Jerez 2022-07-22 17:33:12 -07:00 • committed by Jordan Justen
parent 7b0fbc22dd
commit 189422de1b
3 changed files with 7 additions and 1 deletions
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3
src/intel/compiler/brw_eu_defines.h
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@ -1217,6 +1217,9 @@ enum brw_message_target {
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4
#define XE2_DATAPORT_RENDER_TARGET_WRITE_SIMD32_SINGLE_SOURCE 1
#define XE2_DATAPORT_RENDER_TARGET_WRITE_SIMD16_DUAL_SOURCE 2
/* GFX6 */
#define GFX6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE 7
#define GFX6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8

4
src/intel/compiler/brw_fs.cpp
View file

@ -2120,7 +2120,7 @@ brw_fb_write_msg_control(const fs_inst *inst,
uint32_t mctl;
if (prog_data->dual_src_blend) {
assert(inst->exec_size == 8);
assert(inst->exec_size < 32);
if (inst->group % 16 == 0)
mctl = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01;
@ -2135,6 +2135,8 @@ brw_fb_write_msg_control(const fs_inst *inst,
mctl = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE;
else if (inst->exec_size == 8)
mctl = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01;
else if (inst->exec_size == 32)
mctl = XE2_DATAPORT_RENDER_TARGET_WRITE_SIMD32_SINGLE_SOURCE;
else
unreachable("Invalid FB write execution size");
}

1
src/intel/compiler/brw_lower_logical_sends.cpp
View file

@ -467,6 +467,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
uint32_t msg_ctl = brw_fb_write_msg_control(inst, prog_data);
/* XXX - Bit 13 Per-sample PS enable */
inst->desc =
(inst->group / 16) << 11 | /* rt slot group */
brw_fb_write_desc(devinfo, inst->target, msg_ctl, inst->last_rt,