intel/blorp: Factor bpb into the fast-clear rect

The vertical alignment of the fast-clear rectangle shrinks as the
bits-per-block of the CCS format increases.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28536>
This commit is contained in:
Nanley Chery 2023-08-09 12:56:49 -04:00 committed by Marge Bot
parent 8f483caffb
commit 18326211c3

View file

@ -267,24 +267,12 @@ get_fast_clear_rect(const struct isl_device *dev,
* requirements, an MCS buffer can be created such that it
* follows the requirement and covers the RT.
*
* The alignment size in the table that follows is related to the
* alignment size that is baked into the CCS surface format but with X
* alignment multiplied by 16 and Y alignment multiplied by 32.
* The alignment size in the table that follows is a multiple of the
* alignment size that is baked into the CCS surface format.
*/
x_align = isl_format_get_layout(aux_surf->format)->bw;
y_align = isl_format_get_layout(aux_surf->format)->bh;
x_align *= 16;
/* The line alignment requirement for Y-tiled is halved at SKL and again
* at TGL.
*/
if (dev->info->ver >= 12)
y_align *= 8;
else if (dev->info->ver >= 9)
y_align *= 16;
else
y_align *= 32;
x_align = isl_format_get_layout(aux_surf->format)->bw * 16;
y_align = isl_format_get_layout(aux_surf->format)->bh * 32 /
isl_format_get_layout(aux_surf->format)->bpb;
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):