fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-31 20:40:09 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

r600g: move all invariant state from draw_vbo into start_cs

Browse source
This commit is contained in:
Marek Olšák 2012-02-02 08:27:01 +01:00
parent f126253040
commit 182fd4c544
7 changed files with 35 additions and 20 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/gallium/drivers/r600/evergreen_hw_context.c
View file

@ -44,7 +44,6 @@ static const struct r600_reg cayman_config_reg_list[] = {
};
static const struct r600_reg evergreen_ctl_const_list[] = {
{R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0},
{R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0},
};
@ -104,8 +103,6 @@ static const struct r600_reg evergreen_context_reg_list[] = {
{R_0282D4_PA_SC_VPORT_ZMAX_0, 0, 0},
{R_028350_SX_MISC, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_028400_VGT_MAX_VTX_INDX, 0, 0},
{R_028404_VGT_MIN_VTX_INDX, 0, 0},
{R_028408_VGT_INDX_OFFSET, 0, 0},
{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0},
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0},
@ -413,8 +410,6 @@ static const struct r600_reg cayman_context_reg_list[] = {
{R_0282D4_PA_SC_VPORT_ZMAX_0, 0, 0},
{R_028350_SX_MISC, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
{R_028400_VGT_MAX_VTX_INDX, 0, 0},
{R_028404_VGT_MIN_VTX_INDX, 0, 0},
{R_028408_VGT_INDX_OFFSET, 0, 0},
{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0},
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0},

14
src/gallium/drivers/r600/evergreen_state.c
View file

@ -1864,7 +1864,7 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
r600_store_context_reg(cb, CM_R_028804_DB_EQAA, 0x110000);
r600_store_context_reg_seq(cb, R_028380_SQ_VTX_SEMANTIC_0, 32);
r600_store_context_reg_seq(cb, R_028380_SQ_VTX_SEMANTIC_0, 34);
r600_store_value(cb, 0); /* R_028380_SQ_VTX_SEMANTIC_0 */
r600_store_value(cb, 0);
r600_store_value(cb, 0);
@ -1897,6 +1897,10 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
r600_store_value(cb, 0);
r600_store_value(cb, 0);
r600_store_value(cb, 0); /* R_0283FC_SQ_VTX_SEMANTIC_31 */
r600_store_value(cb, ~0); /* R_028400_VGT_MAX_VTX_INDX */
r600_store_value(cb, 0); /* R_028404_VGT_MIN_VTX_INDX */
r600_store_ctl_const(cb, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0);
}
void evergreen_init_atom_start_cs(struct r600_context *rctx)
@ -2291,7 +2295,7 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
r600_store_config_reg(cb, R_008A14_PA_CL_ENHANCE, (3 << 1) | 1);
r600_store_context_reg_seq(cb, R_028380_SQ_VTX_SEMANTIC_0, 32);
r600_store_context_reg_seq(cb, R_028380_SQ_VTX_SEMANTIC_0, 34);
r600_store_value(cb, 0); /* R_028380_SQ_VTX_SEMANTIC_0 */
r600_store_value(cb, 0);
r600_store_value(cb, 0);
@ -2323,7 +2327,11 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
r600_store_value(cb, 0);
r600_store_value(cb, 0);
r600_store_value(cb, 0);
r600_store_value(cb, 0); /* R_028380_SQ_VTX_SEMANTIC_31 */
r600_store_value(cb, 0); /* R_0283FC_SQ_VTX_SEMANTIC_31 */
r600_store_value(cb, ~0); /* R_028400_VGT_MAX_VTX_INDX */
r600_store_value(cb, 0); /* R_028404_VGT_MIN_VTX_INDX */
r600_store_ctl_const(cb, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0);
}
void evergreen_polygon_offset_update(struct r600_context *rctx)

3
src/gallium/drivers/r600/r600_hw_context.c
View file

@ -250,7 +250,6 @@ static const struct r600_reg r600_config_reg_list[] = {
};
static const struct r600_reg r600_ctl_const_list[] = {
{R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0},
{R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0},
};
@ -571,8 +570,6 @@ static const struct r600_reg r600_context_reg_list[] = {
{R_028850_SQ_PGM_RESOURCES_PS, 0, 0},
{R_028854_SQ_PGM_EXPORTS_PS, 0, 0},
{R_0288CC_SQ_PGM_CF_OFFSET_PS, 0, 0},
{R_028400_VGT_MAX_VTX_INDX, 0, 0},
{R_028404_VGT_MIN_VTX_INDX, 0, 0},
{R_028408_VGT_INDX_OFFSET, 0, 0},
{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0},
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0},

20
src/gallium/drivers/r600/r600_pipe.h
View file

@ -491,9 +491,11 @@ unsigned r600_tex_compare(unsigned compare);
#define PKT3_SET_CONFIG_REG 0x68
#define PKT3_SET_CONTEXT_REG 0x69
#define PKT3_SET_CTL_CONST 0x6F
#define R600_CONFIG_REG_OFFSET 0x8000
#define R600_CONFIG_REG_OFFSET 0x08000
#define R600_CONTEXT_REG_OFFSET 0x28000
#define R600_CTL_CONST_OFFSET 0x3CFF0
#define PKT_TYPE_S(x) (((x) & 0x3) << 30)
#define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
@ -516,12 +518,20 @@ static INLINE void r600_store_config_reg_seq(struct r600_command_buffer *cb, uns
static INLINE void r600_store_context_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
{
assert(reg >= R600_CONTEXT_REG_OFFSET);
assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET);
assert(cb->atom.num_dw+2+num <= cb->max_num_dw);
cb->buf[cb->atom.num_dw++] = PKT3(PKT3_SET_CONTEXT_REG, num, 0);
cb->buf[cb->atom.num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2;
}
static INLINE void r600_store_ctl_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
{
assert(reg >= R600_CTL_CONST_OFFSET);
assert(cb->atom.num_dw+2+num <= cb->max_num_dw);
cb->buf[cb->atom.num_dw++] = PKT3(PKT3_SET_CTL_CONST, num, 0);
cb->buf[cb->atom.num_dw++] = (reg - R600_CTL_CONST_OFFSET) >> 2;
}
static INLINE void r600_store_config_reg(struct r600_command_buffer *cb, unsigned reg, unsigned value)
{
r600_store_config_reg_seq(cb, reg, 1);
@ -534,6 +544,12 @@ static INLINE void r600_store_context_reg(struct r600_command_buffer *cb, unsign
r600_store_value(cb, value);
}
static INLINE void r600_store_ctl_const(struct r600_command_buffer *cb, unsigned reg, unsigned value)
{
r600_store_ctl_const_seq(cb, reg, 1);
r600_store_value(cb, value);
}
void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw, enum r600_atom_flags flags);
void r600_release_command_buffer(struct r600_command_buffer *cb);

6
src/gallium/drivers/r600/r600_state.c
View file

@ -2040,6 +2040,12 @@ void r600_init_atom_start_cs(struct r600_context *rctx)
r600_store_value(cb, 0); /* R_028AB8_VGT_VTX_CNT_EN */
r600_store_context_reg(cb, R_028B20_VGT_STRMOUT_BUFFER_EN, 0);
r600_store_context_reg_seq(cb, R_028400_VGT_MAX_VTX_INDX, 2);
r600_store_value(cb, ~0); /* R_028400_VGT_MAX_VTX_INDX */
r600_store_value(cb, 0); /* R_028404_VGT_MIN_VTX_INDX */
r600_store_ctl_const(cb, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0);
}
void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader)

6
src/gallium/drivers/r600/r600_state_common.c
View file

@ -845,12 +845,9 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
rctx->vgt.nregs = 0;
r600_pipe_state_add_reg(&rctx->vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_028400_VGT_MAX_VTX_INDX, ~0, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_028404_VGT_MIN_VTX_INDX, 0, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_028408_VGT_INDX_OFFSET, info.index_bias, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info.restart_index, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info.primitive_restart, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_03CFF4_SQ_VTX_START_INST_LOC, info.start_instance, NULL, 0);
r600_pipe_state_add_reg(&rctx->vgt, R_028A0C_PA_SC_LINE_STIPPLE, 0, NULL, 0);
if (rctx->chip_class <= R700)
@ -862,12 +859,9 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
rctx->vgt.nregs = 0;
r600_pipe_state_mod_reg(&rctx->vgt, prim);
r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_target_mask & mask);
r600_pipe_state_mod_reg(&rctx->vgt, ~0);
r600_pipe_state_mod_reg(&rctx->vgt, 0);
r600_pipe_state_mod_reg(&rctx->vgt, info.index_bias);
r600_pipe_state_mod_reg(&rctx->vgt, info.restart_index);
r600_pipe_state_mod_reg(&rctx->vgt, info.primitive_restart);
r600_pipe_state_mod_reg(&rctx->vgt, 0);
r600_pipe_state_mod_reg(&rctx->vgt, info.start_instance);
if (prim == V_008958_DI_PT_LINELIST)

1
src/gallium/drivers/r600/r600d.h
View file

@ -44,7 +44,6 @@
#define R600_RESOURCE_END 0X0003C000
#define R600_SAMPLER_OFFSET 0X0003C000
#define R600_SAMPLER_END 0X0003CFF0
#define R600_CTL_CONST_OFFSET 0X0003CFF0
#define R600_CTL_CONST_END 0X0003E200
#define R600_LOOP_CONST_OFFSET 0X0003E200
#define R600_LOOP_CONST_END 0X0003E380