diff --git a/src/freedreno/common/freedreno_dev_info.h b/src/freedreno/common/freedreno_dev_info.h index 7dd1f431527..89ed296ed33 100644 --- a/src/freedreno/common/freedreno_dev_info.h +++ b/src/freedreno/common/freedreno_dev_info.h @@ -230,7 +230,6 @@ struct fd_dev_info { uint32_t RB_DBG_ECO_CNTL; uint32_t RB_DBG_ECO_CNTL_blit; uint32_t RB_RBP_CNTL; - uint32_t VPC_DBG_ECO_CNTL; uint32_t UCHE_UNKNOWN_0E12; uint32_t RB_CCU_DBG_ECO_CNTL; diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py index ec6efb29268..c89322a7238 100644 --- a/src/freedreno/common/freedreno_devices.py +++ b/src/freedreno/common/freedreno_devices.py @@ -471,7 +471,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x00000001, - VPC_DBG_ECO_CNTL = 0x0, UCHE_UNKNOWN_0E12 = 0x10000000, ), raw_magic_regs = [ @@ -484,6 +483,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000004], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0], ], )) @@ -508,7 +508,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x00000001, - VPC_DBG_ECO_CNTL = 0x0, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -521,6 +520,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000004], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0x00080000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0], ], )) @@ -540,7 +540,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -553,6 +552,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0x01000000], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000004], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -573,7 +573,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -586,6 +585,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_CHICKEN_BITS, 0x00001400], [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0x03000000], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -607,7 +607,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x05100000, RB_RBP_CNTL = 0x00000001, - VPC_DBG_ECO_CNTL = 0x0, UCHE_UNKNOWN_0E12 = 0x10000001 ), raw_magic_regs = [ @@ -620,6 +619,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000004], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0x00080000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0], ], )) @@ -641,7 +641,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x00000001, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -654,6 +653,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000004], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -675,7 +675,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x00000001, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -688,6 +687,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000004], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -708,7 +708,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -722,6 +721,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0x01000000], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000004], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -748,7 +748,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -761,6 +760,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0x00000006], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000084], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -781,7 +781,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -794,6 +793,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0x01000000], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000084], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -814,7 +814,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x04100000, RB_DBG_ECO_CNTL_blit = 0x04100000, RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -827,6 +826,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0x6], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000084], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -848,7 +848,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x100000, RB_DBG_ECO_CNTL_blit = 0x00100000, # ??? RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x2000400, UCHE_UNKNOWN_0E12 = 0x00000001 ), raw_magic_regs = [ @@ -862,6 +861,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0x1200000], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000084], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x2000400], ], )) @@ -897,7 +897,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x100000, RB_DBG_ECO_CNTL_blit = 0x100000, RB_RBP_CNTL = 0x1, - VPC_DBG_ECO_CNTL = 0x0, UCHE_UNKNOWN_0E12 = 0x1, ), raw_magic_regs = [ @@ -910,6 +909,7 @@ add_gpus([ [A6XXRegs.REG_A6XX_SP_DBG_ECO_CNTL, 0], [A6XXRegs.REG_A6XX_UCHE_CLIENT_PF, 0x00000084], [A6XXRegs.REG_A6XX_HLSQ_DBG_ECO_CNTL, 0x02000000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0], ], )) @@ -1023,7 +1023,6 @@ a730_magic_regs = dict( RB_DBG_ECO_CNTL = 0x00000000, RB_DBG_ECO_CNTL_blit = 0x00000000, # is it even needed? RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x3200000, RB_CCU_DBG_ECO_CNTL = 0x02080000, @@ -1068,13 +1067,13 @@ a730_raw_magic_regs = [ [A6XXRegs.REG_A7XX_RB_UNKNOWN_8E79, 0x00000000], [A6XXRegs.REG_A7XX_RB_UNKNOWN_8899, 0x00000000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ] a740_magic_regs = dict( RB_DBG_ECO_CNTL = 0x00000000, RB_DBG_ECO_CNTL_blit = 0x00000000, # is it even needed? RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000000, RB_CCU_DBG_ECO_CNTL = 0x02080000, @@ -1122,6 +1121,7 @@ a740_raw_magic_regs = [ [A6XXRegs.REG_A7XX_RB_UNKNOWN_8E79, 0x00000000], [A6XXRegs.REG_A7XX_RB_UNKNOWN_8899, 0x00000000], [A6XXRegs.REG_A7XX_RB_UNKNOWN_8C34, 0x00000000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ] add_gpus([ @@ -1178,7 +1178,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x00000001, RB_DBG_ECO_CNTL_blit = 0x00000001, # is it even needed? RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000000, RB_CCU_DBG_ECO_CNTL = 0x02080000, @@ -1223,6 +1222,7 @@ add_gpus([ [A6XXRegs.REG_A7XX_RB_UNKNOWN_8E79, 0x00000000], [A6XXRegs.REG_A7XX_RB_UNKNOWN_8899, 0x00000000], [A6XXRegs.REG_A7XX_RB_UNKNOWN_8C34, 0x00000000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -1302,6 +1302,7 @@ add_gpus([ [A6XXRegs.REG_A7XX_RB_UNKNOWN_8E79, 0x00000000], [A6XXRegs.REG_A7XX_RB_UNKNOWN_8899, 0x00000000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) @@ -1322,7 +1323,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x00000001, RB_DBG_ECO_CNTL_blit = 0x00000000, # is it even needed? RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x00000000, RB_CCU_DBG_ECO_CNTL = 0x02080000, @@ -1348,7 +1348,6 @@ add_gpus([ RB_DBG_ECO_CNTL = 0x00000001, RB_DBG_ECO_CNTL_blit = 0x00000001, RB_RBP_CNTL = 0x0, - VPC_DBG_ECO_CNTL = 0x02000000, UCHE_UNKNOWN_0E12 = 0x40000000, RB_CCU_DBG_ECO_CNTL = 0x02082000, @@ -1395,6 +1394,7 @@ add_gpus([ [A6XXRegs.REG_A7XX_SP_PS_OUTPUT_CONST_CNTL, 0], [A6XXRegs.REG_A7XX_SP_PS_OUTPUT_CONST_MASK, 0], [A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL, 0x11100000], + [A6XXRegs.REG_A6XX_VPC_DBG_ECO_CNTL, 0x02000000], ], )) diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 661b6d3f730..6a4c49ebcc3 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -1970,8 +1970,6 @@ tu6_init_static_regs(struct tu_device *dev, struct tu_cs *cs) tu_cs_emit_write_reg(cs, REG_A6XX_HLSQ_UNKNOWN_BE01, 0); } - tu_cs_emit_write_reg(cs, REG_A6XX_VPC_DBG_ECO_CNTL, - phys_dev->info->a6xx.magic.VPC_DBG_ECO_CNTL); tu_cs_emit_write_reg(cs, REG_A6XX_SP_GFX_USIZE, 0); // 2 on a740 ??? tu_cs_emit_write_reg(cs, REG_A6XX_TPL1_PS_ROTATION_CNTL, 0); if (CHIP == A6XX) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc index 7e9514cffae..3f290e4dc08 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc @@ -876,7 +876,6 @@ fd6_emit_static_non_context_regs(struct fd_context *ctx, fd_cs &cs) ncrb.add(HLSQ_UNKNOWN_BE01(CHIP)); } - ncrb.add(VPC_DBG_ECO_CNTL(CHIP, .dword = screen->info->a6xx.magic.VPC_DBG_ECO_CNTL)); ncrb.add(UCHE_UNKNOWN_0E12(CHIP, .dword = screen->info->a6xx.magic.UCHE_UNKNOWN_0E12)); if (CHIP == A6XX) {