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radv/meta: fix potential memleak when creating DCC retile pipelines
If the driver needs to create two different DCC retile pipelines which is based on the image swizzle, it will just overwrite the existing layouts. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30233>
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parent
8e53114de3
commit
176befe439
1 changed files with 31 additions and 27 deletions
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@ -89,35 +89,39 @@ radv_device_init_meta_dcc_retile_state(struct radv_device *device, struct radeon
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VkResult result = VK_SUCCESS;
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nir_shader *cs = build_dcc_retile_compute_shader(device, surf);
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const VkDescriptorSetLayoutBinding bindings[] = {
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{
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.binding = 0,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
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.descriptorCount = 1,
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if (!device->meta_state.dcc_retile.ds_layout) {
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const VkDescriptorSetLayoutBinding bindings[] = {
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{
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.binding = 0,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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},
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{
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.binding = 1,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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},
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};
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result = radv_meta_create_descriptor_set_layout(device, 2, bindings, &device->meta_state.dcc_retile.ds_layout);
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if (result != VK_SUCCESS)
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goto cleanup;
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}
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if (!device->meta_state.dcc_retile.p_layout) {
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const VkPushConstantRange pc_range = {
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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},
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{
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.binding = 1,
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.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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},
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.size = 16,
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};
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};
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result = radv_meta_create_descriptor_set_layout(device, 2, bindings, &device->meta_state.dcc_retile.ds_layout);
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if (result != VK_SUCCESS)
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goto cleanup;
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const VkPushConstantRange pc_range = {
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.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
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.size = 16,
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};
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result = radv_meta_create_pipeline_layout(device, &device->meta_state.dcc_retile.ds_layout, 1, &pc_range,
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&device->meta_state.dcc_retile.p_layout);
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if (result != VK_SUCCESS)
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goto cleanup;
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result = radv_meta_create_pipeline_layout(device, &device->meta_state.dcc_retile.ds_layout, 1, &pc_range,
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&device->meta_state.dcc_retile.p_layout);
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if (result != VK_SUCCESS)
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goto cleanup;
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}
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result = radv_meta_create_compute_pipeline(device, cs, device->meta_state.dcc_retile.p_layout,
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&device->meta_state.dcc_retile.pipeline[surf->u.gfx9.swizzle_mode]);
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