From 175c06e5cd17d090de2da627da2c70dae0b194c3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Sch=C3=BCrmann?= Date: Fri, 23 Aug 2024 11:57:28 +0200 Subject: [PATCH] intel: switch to nir_metadata_divergence Reviewed-by: Alyssa Rosenzweig Reviewed-by: Rhys Perry Part-of: --- src/intel/compiler/brw_nir.c | 10 ---------- src/intel/compiler/elk/elk_nir.c | 9 --------- src/intel/compiler/intel_nir_blockify_uniform_loads.c | 5 ++++- ...intel_nir_lower_non_uniform_barycentric_at_sample.c | 1 + src/intel/vulkan/anv_pipeline.c | 3 --- src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c | 3 +++ 6 files changed, 8 insertions(+), 23 deletions(-) diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 987ff15666e..f8c77d05943 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -1664,7 +1664,6 @@ brw_vectorize_lower_mem_access(nir_shader *nir, * - fewer send messages * - reduced register pressure */ - nir_divergence_analysis(nir); if (OPT(intel_nir_blockify_uniform_loads, compiler->devinfo)) { OPT(nir_opt_load_store_vectorize, &options); @@ -1853,9 +1852,6 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler, OPT(nir_opt_move, nir_move_comparisons); OPT(nir_opt_dead_cf); - bool divergence_analysis_dirty = false; - NIR_PASS_V(nir, nir_divergence_analysis); - static const nir_lower_subgroups_options subgroups_options = { .ballot_bit_size = 32, .ballot_components = 1, @@ -1870,8 +1866,6 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler, if (OPT(nir_lower_int64)) brw_nir_optimize(nir, devinfo); - - divergence_analysis_dirty = true; } /* nir_opt_uniform_subgroup can create some operations (e.g., @@ -1902,10 +1896,6 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler, /* Do this only after the last opt_gcm. GCM will undo this lowering. */ if (nir->info.stage == MESA_SHADER_FRAGMENT) { - if (divergence_analysis_dirty) { - NIR_PASS_V(nir, nir_divergence_analysis); - } - OPT(intel_nir_lower_non_uniform_barycentric_at_sample); } diff --git a/src/intel/compiler/elk/elk_nir.c b/src/intel/compiler/elk/elk_nir.c index 6c73aba4221..35464d508ed 100644 --- a/src/intel/compiler/elk/elk_nir.c +++ b/src/intel/compiler/elk/elk_nir.c @@ -1468,9 +1468,6 @@ elk_postprocess_nir(nir_shader *nir, const struct elk_compiler *compiler, OPT(nir_opt_move, nir_move_comparisons); OPT(nir_opt_dead_cf); - bool divergence_analysis_dirty = false; - NIR_PASS_V(nir, nir_divergence_analysis); - /* TODO: Enable nir_opt_uniform_atomics on Gfx7.x too. * It currently fails Vulkan tests on Haswell for an unknown reason. */ @@ -1486,16 +1483,10 @@ elk_postprocess_nir(nir_shader *nir, const struct elk_compiler *compiler, if (OPT(nir_lower_int64)) elk_nir_optimize(nir, is_scalar, devinfo); - - divergence_analysis_dirty = true; } /* Do this only after the last opt_gcm. GCM will undo this lowering. */ if (nir->info.stage == MESA_SHADER_FRAGMENT) { - if (divergence_analysis_dirty) { - NIR_PASS_V(nir, nir_divergence_analysis); - } - OPT(intel_nir_lower_non_uniform_barycentric_at_sample); } diff --git a/src/intel/compiler/intel_nir_blockify_uniform_loads.c b/src/intel/compiler/intel_nir_blockify_uniform_loads.c index 2595075da19..8db751f14d2 100644 --- a/src/intel/compiler/intel_nir_blockify_uniform_loads.c +++ b/src/intel/compiler/intel_nir_blockify_uniform_loads.c @@ -237,9 +237,12 @@ bool intel_nir_blockify_uniform_loads(nir_shader *shader, const struct intel_device_info *devinfo) { + nir_divergence_analysis(shader); + return nir_shader_instructions_pass(shader, intel_nir_blockify_uniform_loads_instr, nir_metadata_control_flow | - nir_metadata_live_defs, + nir_metadata_live_defs | + nir_metadata_divergence, (void *) devinfo); } diff --git a/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c b/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c index c7e7ef8a32e..8d42b67ac88 100644 --- a/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c +++ b/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c @@ -131,6 +131,7 @@ intel_nir_lower_non_uniform_barycentric_at_sample(nir_shader *nir) { bool progress; + nir_divergence_analysis(nir); nir_shader_clear_pass_flags(nir); progress = nir_shader_instructions_pass( diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 7609ddf6e78..92698f1eeb7 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1010,9 +1010,6 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline, NIR_PASS(progress, nir, nir_opt_dce); } while (progress); - /* Needed for anv_nir_lower_ubo_loads. */ - nir_divergence_analysis(nir); - NIR_PASS(_, nir, anv_nir_lower_ubo_loads); enum nir_lower_non_uniform_access_type lower_non_uniform_access_types = diff --git a/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c b/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c index 49e6f15a719..cd171f9dcb8 100644 --- a/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c +++ b/src/intel/vulkan_hasvk/anv_nir_lower_ubo_loads.c @@ -22,6 +22,7 @@ */ #include "anv_nir.h" +#include "nir.h" #include "nir_builder.h" static bool @@ -114,6 +115,8 @@ lower_ubo_load_instr(nir_builder *b, nir_intrinsic_instr *load, bool anv_nir_lower_ubo_loads(nir_shader *shader) { + nir_divergence_analysis(shader); + return nir_shader_intrinsics_pass(shader, lower_ubo_load_instr, nir_metadata_none, NULL);