diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index 9a78c5896bc..9127c68e0a4 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -2238,7 +2238,7 @@ agx_update_descriptors(struct agx_batch *batch, struct agx_compiled_shader *cs, agx_upload_samplers(batch, cs, stage); if (ctx->stage[stage].dirty) { - batch->tables[AGX_SYSVAL_STAGE(stage)] = + batch->uniforms.tables[AGX_SYSVAL_STAGE(stage)] = agx_upload_stage_uniforms(batch, batch->textures[stage], stage); } } @@ -2269,8 +2269,9 @@ agx_build_pipeline(struct agx_batch *batch, struct agx_compiled_shader *cs, } for (unsigned i = 0; i < cs->push_range_count; ++i) { - agx_usc_uniform(&b, cs->push[i].uniform, cs->push[i].length, - batch->tables[cs->push[i].table] + cs->push[i].offset); + agx_usc_uniform( + &b, cs->push[i].uniform, cs->push[i].length, + batch->uniforms.tables[cs->push[i].table] + cs->push[i].offset); } if (stage == PIPE_SHADER_FRAGMENT) { @@ -2594,7 +2595,7 @@ agx_batch_init_state(struct agx_batch *batch) } /* Set up standard sample positions */ - batch->ppp_multisamplectl = + batch->uniforms.ppp_multisamplectl = agx_default_sample_positions(batch->tilebuffer_layout.nr_samples); } @@ -3264,13 +3265,13 @@ agx_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info) struct agx_resource *indirect = agx_resource(info->indirect); agx_batch_reads(batch, indirect); - batch->tables[AGX_SYSVAL_TABLE_GRID] = + batch->uniforms.tables[AGX_SYSVAL_TABLE_GRID] = indirect->bo->ptr.gpu + info->indirect_offset; } else { static_assert(sizeof(info->grid) == 12, "matches indirect dispatch buffer"); - batch->tables[AGX_SYSVAL_TABLE_GRID] = agx_pool_upload_aligned( + batch->uniforms.tables[AGX_SYSVAL_TABLE_GRID] = agx_pool_upload_aligned( &batch->pool, info->grid, sizeof(info->grid), 4); } @@ -3315,9 +3316,9 @@ agx_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info) if (info->indirect) { agx_pack(out, CDM_INDIRECT, cfg) { - cfg.address_hi = batch->tables[AGX_SYSVAL_TABLE_GRID] >> 32; + cfg.address_hi = batch->uniforms.tables[AGX_SYSVAL_TABLE_GRID] >> 32; cfg.address_lo = - batch->tables[AGX_SYSVAL_TABLE_GRID] & BITFIELD64_MASK(32); + batch->uniforms.tables[AGX_SYSVAL_TABLE_GRID] & BITFIELD64_MASK(32); } out += AGX_CDM_INDIRECT_LENGTH; } else { @@ -3347,7 +3348,7 @@ agx_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info) /* TODO: Allow multiple kernels in a batch? */ agx_flush_batch_for_reason(ctx, batch, "Compute kernel serialization"); - batch->tables[AGX_SYSVAL_TABLE_GRID] = 0; + batch->uniforms.tables[AGX_SYSVAL_TABLE_GRID] = 0; } void agx_init_state_functions(struct pipe_context *ctx); diff --git a/src/gallium/drivers/asahi/agx_state.h b/src/gallium/drivers/asahi/agx_state.h index 00ee5bcf226..d975141ee4c 100644 --- a/src/gallium/drivers/asahi/agx_state.h +++ b/src/gallium/drivers/asahi/agx_state.h @@ -131,7 +131,9 @@ struct PACKED agx_draw_uniforms { /* Blend constant if any */ float blend_constant[4]; - /* Value of the ppp_multisamplectl control register */ + /* Value of the multisample control register, containing sample positions in + * each byte (x in low nibble, y in high nibble). + */ uint32_t ppp_multisamplectl; /* glSampleMask */ @@ -266,13 +268,7 @@ struct agx_batch { /* Current varyings linkage structures */ uint32_t varyings; - /* Value of the multisample control register, containing sample positions in - * each byte (x in low nibble, y in high nibble). - */ - uint32_t ppp_multisamplectl; - - /* Pointers to the system value tables */ - uint64_t tables[AGX_NUM_SYSVAL_TABLES]; + struct agx_draw_uniforms uniforms; /* Uploaded descriptors */ uint64_t textures[PIPE_SHADER_TYPES]; diff --git a/src/gallium/drivers/asahi/agx_uniforms.c b/src/gallium/drivers/asahi/agx_uniforms.c index 07b160b6a17..c35630635ee 100644 --- a/src/gallium/drivers/asahi/agx_uniforms.c +++ b/src/gallium/drivers/asahi/agx_uniforms.c @@ -58,32 +58,28 @@ agx_upload_uniforms(struct agx_batch *batch) struct agx_ptr root_ptr = agx_pool_alloc_aligned( &batch->pool, sizeof(struct agx_draw_uniforms), 16); - batch->tables[AGX_SYSVAL_TABLE_ROOT] = root_ptr.gpu; - - struct agx_draw_uniforms uniforms = { - .sample_mask = ctx->sample_mask, - .ppp_multisamplectl = batch->ppp_multisamplectl, - }; - - memcpy(&uniforms.tables, &batch->tables, sizeof(batch->tables)); + batch->uniforms.tables[AGX_SYSVAL_TABLE_ROOT] = root_ptr.gpu; + batch->uniforms.sample_mask = ctx->sample_mask; u_foreach_bit(vbo, ctx->vb_mask) { - uniforms.vbo_base[vbo] = agx_vertex_buffer_ptr(batch, vbo); + batch->uniforms.vbo_base[vbo] = agx_vertex_buffer_ptr(batch, vbo); } if (ctx->streamout.key.active) { - uniforms.xfb = ctx->streamout.params; + batch->uniforms.xfb = ctx->streamout.params; for (unsigned i = 0; i < batch->ctx->streamout.num_targets; ++i) { uint32_t size = 0; - uniforms.xfb.base[i] = agx_batch_get_so_address(batch, i, &size); - uniforms.xfb.size[i] = size; + batch->uniforms.xfb.base[i] = + agx_batch_get_so_address(batch, i, &size); + batch->uniforms.xfb.size[i] = size; } } - memcpy(uniforms.blend_constant, &ctx->blend_color, sizeof(ctx->blend_color)); + memcpy(batch->uniforms.blend_constant, &ctx->blend_color, + sizeof(ctx->blend_color)); - memcpy(root_ptr.cpu, &uniforms, sizeof(uniforms)); + memcpy(root_ptr.cpu, &batch->uniforms, sizeof(batch->uniforms)); } uint64_t