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radeonsi: adjust RB+ blend optimization settings

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based on PAL
This commit is contained in:
Marek Olšák 2019-07-23 00:32:06 -04:00
parent 27ac9a3326
commit 17021efc74
2 changed files with 2 additions and 4 deletions
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2
src/amd/registers/amdgfxregs.json
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@ -1000,7 +1000,7 @@
{"name": "EXACT", "value": 0}, {"name": "EXACT", "value": 0},
{"name": "11BIT_FORMAT", "value": 1}, {"name": "11BIT_FORMAT", "value": 1},
{"name": "10BIT_FORMAT", "value": 3}, {"name": "10BIT_FORMAT", "value": 3},
{"name": "8BIT_FORMAT", "value": 7}, {"name": "8BIT_FORMAT", "value": 6},
{"name": "6BIT_FORMAT", "value": 11}, {"name": "6BIT_FORMAT", "value": 11},
{"name": "5BIT_FORMAT", "value": 13}, {"name": "5BIT_FORMAT", "value": 13},
{"name": "4BIT_FORMAT", "value": 15} {"name": "4BIT_FORMAT", "value": 15}

4
src/gallium/drivers/radeonsi/si_state.c
View file

@ -250,10 +250,8 @@ static void si_emit_cb_render_state(struct si_context *sctx)
break; break;
case V_028C70_COLOR_10_11_11: case V_028C70_COLOR_10_11_11:
if (spi_format == V_028714_SPI_SHADER_FP16_ABGR) { if (spi_format == V_028714_SPI_SHADER_FP16_ABGR)
sx_ps_downconvert |= V_028754_SX_RT_EXPORT_10_11_11 << (i * 4); sx_ps_downconvert |= V_028754_SX_RT_EXPORT_10_11_11 << (i * 4);
sx_blend_opt_epsilon |= V_028758_11BIT_FORMAT << (i * 4);
}
break; break;
case V_028C70_COLOR_2_10_10_10: case V_028C70_COLOR_2_10_10_10: