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radeonsi: wait for outstanding memory instructions in TCS barriers

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Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-12-02 19:10:11 +01:00
parent 15e96c70b0
commit 16f49c16c7
1 changed files with 5 additions and 1 deletions
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6
src/gallium/drivers/radeonsi/si_shader.c
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@ -3280,6 +3280,7 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
* point in the program by emitting empty inline assembly that is marked as
* having side effects.
*/
#if 0 /* unused currently */
static void emit_optimization_barrier(struct si_shader_context *ctx)
{
LLVMBuilderRef builder = ctx->gallivm.builder;
@ -3287,7 +3288,10 @@ static void emit_optimization_barrier(struct si_shader_context *ctx)
LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, "", "", true, false);
LLVMBuildCall(builder, inlineasm, NULL, 0, "");
}
#endif
/* Combine these with & instead of |. */
#define LGKM_CNT 0x07f
#define VM_CNT 0xf70
static void emit_waitcnt(struct si_shader_context *ctx, unsigned simm16)
@ -5333,7 +5337,7 @@ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
* always fits into a single wave.
*/
if (ctx->type == PIPE_SHADER_TESS_CTRL) {
emit_optimization_barrier(ctx);
emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
return;
}