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radeonsi: get rid of img/buf/sampler descriptor preloading (v2)
26011 shaders in 14651 tests Totals: SGPRS: 1251920 -> 1152636 (-7.93 %) VGPRS: 728421 -> 728198 (-0.03 %) Spilled SGPRs: 16644 -> 3776 (-77.31 %) Spilled VGPRs: 369 -> 369 (0.00 %) Scratch VGPRs: 1344 -> 1344 (0.00 %) dwords per thread Code Size: 36001064 -> 35835152 (-0.46 %) bytes LDS: 767 -> 767 (0.00 %) blocks Max Waves: 222221 -> 222372 (0.07 %) Wait states: 0 -> 0 (0.00 %) v2: merge codepaths where possible Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
parent
22797d7d83
commit
16be87c904
1 changed files with 48 additions and 133 deletions
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@ -107,11 +107,6 @@ struct si_shader_context
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/* Preloaded descriptors. */
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LLVMValueRef const_buffers[SI_NUM_CONST_BUFFERS];
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LLVMValueRef shader_buffers[SI_NUM_SHADER_BUFFERS];
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LLVMValueRef sampler_views[SI_NUM_SAMPLERS];
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LLVMValueRef sampler_states[SI_NUM_SAMPLERS];
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LLVMValueRef fmasks[SI_NUM_SAMPLERS];
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LLVMValueRef images[SI_NUM_IMAGES];
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LLVMValueRef esgs_ring;
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LLVMValueRef gsvs_ring[4];
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@ -3406,18 +3401,18 @@ static LLVMValueRef
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shader_buffer_fetch_rsrc(struct si_shader_context *ctx,
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const struct tgsi_full_src_register *reg)
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{
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LLVMValueRef ind_index;
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LLVMValueRef rsrc_ptr;
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LLVMValueRef index;
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LLVMValueRef rsrc_ptr = LLVMGetParam(ctx->radeon_bld.main_fn,
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SI_PARAM_SHADER_BUFFERS);
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if (!reg->Register.Indirect)
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return ctx->shader_buffers[reg->Register.Index];
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index = LLVMConstInt(ctx->i32, reg->Register.Index, 0);
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else
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index = get_bounded_indirect_index(ctx, ®->Indirect,
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reg->Register.Index,
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SI_NUM_SHADER_BUFFERS);
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ind_index = get_bounded_indirect_index(ctx, ®->Indirect,
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reg->Register.Index,
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SI_NUM_SHADER_BUFFERS);
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rsrc_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_SHADER_BUFFERS);
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return build_indexed_load_const(ctx, rsrc_ptr, ind_index);
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return build_indexed_load_const(ctx, rsrc_ptr, index);
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}
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static bool tgsi_is_array_sampler(unsigned target)
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@ -3480,18 +3475,21 @@ image_fetch_rsrc(
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LLVMValueRef *rsrc)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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LLVMValueRef rsrc_ptr = LLVMGetParam(ctx->radeon_bld.main_fn,
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SI_PARAM_IMAGES);
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LLVMValueRef index, tmp;
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assert(image->Register.File == TGSI_FILE_IMAGE);
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if (!image->Register.Indirect) {
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/* Fast path: use preloaded resources */
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*rsrc = ctx->images[image->Register.Index];
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} else {
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/* Indexing and manual load */
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LLVMValueRef ind_index;
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LLVMValueRef rsrc_ptr;
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LLVMValueRef tmp;
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const struct tgsi_shader_info *info = bld_base->info;
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index = LLVMConstInt(ctx->i32, image->Register.Index, 0);
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if (info->images_writemask & (1 << image->Register.Index) &&
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!(info->images_buffers & (1 << image->Register.Index)))
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dcc_off = true;
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} else {
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/* From the GL_ARB_shader_image_load_store extension spec:
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*
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* If a shader performs an image load, store, or atomic
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@ -3501,16 +3499,15 @@ image_fetch_rsrc(
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* array, the results of the operation are undefined but may
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* not lead to termination.
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*/
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ind_index = get_bounded_indirect_index(ctx, &image->Indirect,
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image->Register.Index,
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SI_NUM_IMAGES);
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rsrc_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_IMAGES);
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tmp = build_indexed_load_const(ctx, rsrc_ptr, ind_index);
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if (dcc_off)
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tmp = force_dcc_off(ctx, tmp);
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*rsrc = tmp;
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index = get_bounded_indirect_index(ctx, &image->Indirect,
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image->Register.Index,
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SI_NUM_IMAGES);
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}
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tmp = build_indexed_load_const(ctx, rsrc_ptr, index);
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if (dcc_off)
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tmp = force_dcc_off(ctx, tmp);
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*rsrc = tmp;
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}
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static LLVMValueRef image_fetch_coords(
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@ -4362,41 +4359,37 @@ static void tex_fetch_ptrs(
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unsigned target = inst->Texture.Texture;
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unsigned sampler_src;
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unsigned sampler_index;
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LLVMValueRef index;
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sampler_src = emit_data->inst->Instruction.NumSrcRegs - 1;
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sampler_index = emit_data->inst->Src[sampler_src].Register.Index;
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if (emit_data->inst->Src[sampler_src].Register.Indirect) {
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const struct tgsi_full_src_register *reg = &emit_data->inst->Src[sampler_src];
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LLVMValueRef ind_index;
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ind_index = get_bounded_indirect_index(ctx,
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®->Indirect,
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reg->Register.Index,
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SI_NUM_SAMPLERS);
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*res_ptr = load_sampler_desc(ctx, ind_index, DESC_IMAGE);
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if (target == TGSI_TEXTURE_2D_MSAA ||
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target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
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if (samp_ptr)
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*samp_ptr = NULL;
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if (fmask_ptr)
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*fmask_ptr = load_sampler_desc(ctx, ind_index, DESC_FMASK);
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} else {
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if (samp_ptr) {
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*samp_ptr = load_sampler_desc(ctx, ind_index, DESC_SAMPLER);
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*samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
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}
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if (fmask_ptr)
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*fmask_ptr = NULL;
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}
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index = get_bounded_indirect_index(ctx,
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®->Indirect,
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reg->Register.Index,
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SI_NUM_SAMPLERS);
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} else {
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*res_ptr = ctx->sampler_views[sampler_index];
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index = LLVMConstInt(ctx->i32, sampler_index, 0);
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}
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*res_ptr = load_sampler_desc(ctx, index, DESC_IMAGE);
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if (target == TGSI_TEXTURE_2D_MSAA ||
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target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
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if (samp_ptr)
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*samp_ptr = ctx->sampler_states[sampler_index];
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*samp_ptr = NULL;
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if (fmask_ptr)
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*fmask_ptr = ctx->fmasks[sampler_index];
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*fmask_ptr = load_sampler_desc(ctx, index, DESC_FMASK);
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} else {
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if (samp_ptr) {
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*samp_ptr = load_sampler_desc(ctx, index, DESC_SAMPLER);
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*samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
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}
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if (fmask_ptr)
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*fmask_ptr = NULL;
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}
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}
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@ -5863,81 +5856,6 @@ static void preload_constant_buffers(struct si_shader_context *ctx)
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}
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}
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static void preload_shader_buffers(struct si_shader_context *ctx)
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{
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struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm;
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LLVMValueRef ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_SHADER_BUFFERS);
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int buf, maxbuf;
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maxbuf = MIN2(ctx->shader->selector->info.file_max[TGSI_FILE_BUFFER],
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SI_NUM_SHADER_BUFFERS - 1);
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for (buf = 0; buf <= maxbuf; ++buf) {
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ctx->shader_buffers[buf] =
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build_indexed_load_const(
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ctx, ptr, lp_build_const_int32(gallivm, buf));
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}
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}
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static void preload_samplers(struct si_shader_context *ctx)
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{
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struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base;
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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const struct tgsi_shader_info *info = bld_base->info;
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unsigned i, num_samplers = info->file_max[TGSI_FILE_SAMPLER] + 1;
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LLVMValueRef offset;
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if (num_samplers == 0)
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return;
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/* Load the resources and samplers, we rely on the code sinking to do the rest */
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for (i = 0; i < num_samplers; ++i) {
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/* Resource */
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offset = lp_build_const_int32(gallivm, i);
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ctx->sampler_views[i] =
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load_sampler_desc(ctx, offset, DESC_IMAGE);
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/* FMASK resource */
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if (info->is_msaa_sampler[i])
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ctx->fmasks[i] =
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load_sampler_desc(ctx, offset, DESC_FMASK);
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else {
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ctx->sampler_states[i] =
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load_sampler_desc(ctx, offset, DESC_SAMPLER);
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ctx->sampler_states[i] =
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sici_fix_sampler_aniso(ctx, ctx->sampler_views[i],
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ctx->sampler_states[i]);
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}
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}
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}
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static void preload_images(struct si_shader_context *ctx)
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{
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struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base;
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struct tgsi_shader_info *info = &ctx->shader->selector->info;
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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unsigned num_images = bld_base->info->file_max[TGSI_FILE_IMAGE] + 1;
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LLVMValueRef res_ptr;
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unsigned i;
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if (num_images == 0)
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return;
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res_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_IMAGES);
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for (i = 0; i < num_images; ++i) {
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/* Rely on LLVM to shrink the load for buffer resources. */
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LLVMValueRef rsrc =
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build_indexed_load_const(ctx, res_ptr,
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lp_build_const_int32(gallivm, i));
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if (info->images_writemask & (1 << i) &&
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!(info->images_buffers & (1 << i)))
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rsrc = force_dcc_off(ctx, rsrc);
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ctx->images[i] = rsrc;
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}
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}
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/**
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* Load ESGS and GSVS ring buffer resource descriptors and save the variables
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* for later use.
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@ -6780,9 +6698,6 @@ int si_compile_tgsi_shader(struct si_screen *sscreen,
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create_meta_data(&ctx);
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create_function(&ctx);
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preload_constant_buffers(&ctx);
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preload_shader_buffers(&ctx);
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preload_samplers(&ctx);
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preload_images(&ctx);
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preload_ring_buffers(&ctx);
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if (ctx.is_monolithic && sel->type == PIPE_SHADER_FRAGMENT &&
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