From 1619fc596a9d438451e68206c18e72c1c794f40b Mon Sep 17 00:00:00 2001 From: Mary Guillemard Date: Mon, 23 Dec 2024 17:08:27 +0100 Subject: [PATCH] bi: Optimize scratch access Follow AGX on this, LLVM cause quite a mess with pan_pack and create uneeded spilling. Signed-off-by: Mary Guillemard Reviewed-by: Alyssa Rosenzweig Reviewed-by: Boris Brezillon Part-of: --- src/panfrost/compiler/bifrost_compile.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/panfrost/compiler/bifrost_compile.c b/src/panfrost/compiler/bifrost_compile.c index c194a41740b..b7b18af9490 100644 --- a/src/panfrost/compiler/bifrost_compile.c +++ b/src/panfrost/compiler/bifrost_compile.c @@ -5429,6 +5429,13 @@ bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id) }; NIR_PASS(_, nir, nir_lower_mem_access_bit_sizes, &mem_size_options); + /* Optimize scratch access */ + NIR_PASS(_, nir, nir_lower_scratch_to_var); + NIR_PASS(_, nir, nir_lower_vars_to_scratch, nir_var_function_temp, 256, + vars_to_scratch_size_align_func, + vars_to_scratch_size_align_func); + NIR_PASS(_, nir, nir_lower_indirect_derefs, nir_var_function_temp, ~0); + nir_lower_ssbo_options ssbo_opts = { .native_loads = pan_arch(gpu_id) >= 9, .native_offset = pan_arch(gpu_id) >= 9,