i965/nir/vec4: Implement vector "any" operation

Adds NIR ALU operations:
   * nir_op_bany2
   * nir_op_bany3
   * nir_op_bany4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
This commit is contained in:
Antia Puentes 2015-06-17 10:08:27 +02:00 committed by Jason Ekstrand
parent fa4e3c3c9f
commit 16072834ba

View file

@ -1228,6 +1228,20 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
inst->saturate = instr->dest.saturate;
break;
case nir_op_bany2:
case nir_op_bany3:
case nir_op_bany4: {
dst_reg tmp = dst_reg(this, glsl_type::bool_type);
tmp.writemask = brw_writemask_for_size(nir_op_infos[instr->op].input_sizes[0]);
emit(CMP(tmp, op[0], src_reg(0), BRW_CONDITIONAL_NZ));
emit(MOV(dst, src_reg(0)));
inst = emit(MOV(dst, src_reg(~0)));
inst->predicate = BRW_PREDICATE_ALIGN16_ANY4H;
break;
}
default:
unreachable("Unimplemented ALU operation");
}