zink: only run nir_lower_clip_halfz for last vertex processing stage

this lets us remove the calcs to un-convert POS during load

Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8152>
This commit is contained in:
Mike Blumenkrantz 2020-07-17 10:48:45 -04:00 committed by Marge Bot
parent 5b2c397c54
commit 15f478fe84
2 changed files with 9 additions and 26 deletions

View file

@ -1744,28 +1744,6 @@ emit_load_deref(struct ntv_context *ctx, nir_intrinsic_instr *intr)
ptr);
unsigned num_components = nir_dest_num_components(intr->dest);
unsigned bit_size = nir_dest_bit_size(intr->dest);
if (ctx->stage > MESA_SHADER_VERTEX && ctx->stage <= MESA_SHADER_GEOMETRY &&
(nir_deref_instr_get_variable(nir_src_as_deref(intr->src[0]))->data.location == VARYING_SLOT_POS)) {
/* we previously transformed opengl gl_Position -> vulkan gl_Position in vertex shader,
* so now we have to reverse that and construct a new gl_Position:
gl_Position.z = gl_Position.z * 2 - gl_Position.w
*/
SpvId components[4];
SpvId f_type = get_fvec_type(ctx, 32, 1);
SpvId base_type = get_fvec_type(ctx, 32, 4);
for (unsigned c = 0; c < 4; c++) {
uint32_t member[] = { c };
components[c] = spirv_builder_emit_composite_extract(&ctx->builder, f_type, result, member, 1);
}
components[2] = emit_binop(ctx, SpvOpFMul, f_type, components[2], emit_float_const(ctx, 32, 2.0));
components[2] = emit_binop(ctx, SpvOpFSub, f_type, components[2], components[3]);
result = spirv_builder_emit_composite_construct(&ctx->builder, base_type,
components, 4);
}
result = bitcast_to_uvec(ctx, result, bit_size, num_components);
store_dest(ctx, &intr->dest, result, nir_type_uint);
}

View file

@ -332,13 +332,19 @@ zink_shader_compile(struct zink_screen *screen, struct zink_shader *zs, struct z
nir_shader *nir = zs->nir;
/* TODO: use a separate mem ctx here for ralloc */
if (zs->has_geometry_shader) {
if (zs->nir->info.stage == MESA_SHADER_GEOMETRY)
if (zs->nir->info.stage == MESA_SHADER_GEOMETRY) {
streamout = &zs->streamout;
NIR_PASS_V(nir, nir_lower_clip_halfz);
}
} else if (zs->has_tess_shader) {
if (zs->nir->info.stage == MESA_SHADER_TESS_EVAL)
if (zs->nir->info.stage == MESA_SHADER_TESS_EVAL) {
streamout = &zs->streamout;
} else
NIR_PASS_V(nir, nir_lower_clip_halfz);
}
} else {
streamout = &zs->streamout;
NIR_PASS_V(nir, nir_lower_clip_halfz);
}
if (!zs->streamout.so_info_slots)
streamout = NULL;
if (zs->nir->info.stage == MESA_SHADER_FRAGMENT) {
@ -403,7 +409,6 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
*/
if (nir->num_uniforms)
NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 16);
NIR_PASS_V(nir, nir_lower_clip_halfz);
if (nir->info.stage < MESA_SHADER_FRAGMENT)
have_psiz = check_psiz(nir);
if (nir->info.stage == MESA_SHADER_GEOMETRY)