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i965g: driver and winsys compile

Browse source 
A milestone of sorts.  Still a long way from something working --
the old one compiled too, at least some of the time...
This commit is contained in:
Keith Whitwell 2009-11-01 19:30:53 +00:00
parent efda453d64
commit 15a8ac2c9d
19 changed files with 315 additions and 558 deletions
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11
src/gallium/drivers/i965/brw_batchbuffer.c
View file

@ -36,7 +36,6 @@
#include "brw_debug.h"
#include "brw_structs.h"
#define BATCH_SIZE (32*1024)
#define USE_LOCAL_BUFFER 1
#define ALWAYS_EMIT_MI_FLUSH 1
@ -49,17 +48,17 @@ brw_batchbuffer_reset(struct brw_batchbuffer *batch)
}
if (USE_LOCAL_BUFFER && !batch->buffer)
batch->buffer = MALLOC(BATCH_SIZE);
batch->buffer = MALLOC(BRW_BATCH_SIZE);
batch->buf = batch->sws->bo_alloc(batch->sws,
BRW_BUFFER_TYPE_BATCH,
BATCH_SIZE, 4096);
BRW_BATCH_SIZE, 4096);
if (batch->buffer)
batch->map = batch->buffer;
else
batch->map = batch->sws->bo_map(batch->buf, GL_TRUE);
batch->size = BATCH_SIZE;
batch->size = BRW_BATCH_SIZE;
batch->ptr = batch->map;
}
@ -132,7 +131,7 @@ _brw_batchbuffer_flush(struct brw_batchbuffer *batch,
batch->map = NULL;
batch->ptr = NULL;
batch->sws->bo_exec(batch->buf, used, NULL, 0, 0 );
batch->sws->bo_exec(batch->buf, used );
#if 0
if (BRW_DEBUG & DEBUG_BATCH) {
@ -196,7 +195,7 @@ brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch,
* the buffer doesn't move and we can short-circuit the relocation processing
* in the kernel
*/
brw_batchbuffer_emit_dword (batch, buffer->offset + delta);
brw_batchbuffer_emit_dword (batch, buffer->offset[0] + delta);
return 0;
}

2
src/gallium/drivers/i965/brw_cc.c
View file

@ -137,7 +137,7 @@ cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
cc.cc3 = key->cc3;
/* CACHE_NEW_CC_VP */
cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */
cc.cc4.cc_viewport_state_offset = *(brw->cc.vp_bo->offset) >> 5; /* reloc */
cc.cc5 = key->cc5;
cc.cc6 = key->cc6;

2
src/gallium/drivers/i965/brw_clip_state.c
View file

@ -83,7 +83,7 @@ clip_unit_create_from_key(struct brw_context *brw,
clip.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1;
/* reloc */
clip.thread0.kernel_start_pointer = brw->clip.prog_bo->offset >> 6;
clip.thread0.kernel_start_pointer = *(brw->clip.prog_bo->offset) >> 6;
clip.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
clip.thread1.single_program_flow = 1;

2
src/gallium/drivers/i965/brw_gs_state.c
View file

@ -79,7 +79,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key)
gs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1;
if (key->prog_active) /* reloc */
gs.thread0.kernel_start_pointer = brw->gs.prog_bo->offset >> 6;
gs.thread0.kernel_start_pointer = brw->gs.prog_bo->offset[0] >> 6;
gs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
gs.thread1.single_program_flow = 1;

6
src/gallium/drivers/i965/brw_screen_texture.c
View file

@ -222,7 +222,11 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen,
/* This is ok for all textures with channel width 8bit or less:
*/
/* tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
tex->ss.ss1.base_addr = tex->bo->offset; /* reloc */
/* XXX: what happens when tex->bo->offset changes???
*/
tex->ss.ss1.base_addr = tex->bo->offset[0]; /* reloc */
tex->ss.ss2.mip_count = tex->base.last_level;
tex->ss.ss2.width = tex->base.width[0] - 1;
tex->ss.ss2.height = tex->base.height[0] - 1;

4
src/gallium/drivers/i965/brw_sf_state.c
View file

@ -138,7 +138,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
memset(&sf, 0, sizeof(sf));
sf.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1;
sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset >> 6; /* reloc */
sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset[0] >> 6; /* reloc */
sf.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
@ -171,7 +171,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
sf.thread4.stats_enable = 1;
/* CACHE_NEW_SF_VP */
sf.sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset >> 5; /* reloc */
sf.sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset[0] >> 5; /* reloc */
sf.sf5.viewport_transform = 1;

6
src/gallium/drivers/i965/brw_state_dump.c
View file

@ -67,7 +67,7 @@ state_struct_out(struct brw_winsys_screen *sws,
data = sws->bo_map(buffer, GL_FALSE);
for (i = 0; i < state_size / 4; i++) {
state_out(name, data, buffer->offset, i,
state_out(name, data, buffer->offset[0], i,
"dword %d\n", i);
}
sws->bo_unmap(buffer);
@ -115,7 +115,7 @@ static void dump_wm_surface_state(struct brw_context *brw)
continue;
}
surf = (struct brw_surface_state *)brw->sws->bo_map(surf_bo, GL_FALSE);
surfoff = surf_bo->offset;
surfoff = surf_bo->offset[0];
sprintf(name, "WM SS%d", i);
state_out(name, surf, surfoff, 0, "%s %s\n",
@ -145,7 +145,7 @@ static void dump_sf_viewport_state(struct brw_context *brw)
return;
vp = (struct brw_sf_viewport *)brw->sws->bo_map(brw->sf.vp_bo, GL_FALSE);
vp_off = brw->sf.vp_bo->offset;
vp_off = brw->sf.vp_bo->offset[0];
state_out(name, vp, vp_off, 0, "m00 = %f\n", vp->viewport.m00);
state_out(name, vp, vp_off, 1, "m11 = %f\n", vp->viewport.m11);

2
src/gallium/drivers/i965/brw_vs_state.c
View file

@ -87,7 +87,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
memset(&vs, 0, sizeof(vs));
vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset >> 6; /* reloc */
vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset[0] >> 6; /* reloc */
vs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1;
vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
/* Choosing multiple program flow means that we may get 2-vertex threads,

39
src/gallium/drivers/i965/brw_winsys.h
View file

@ -31,12 +31,15 @@
struct brw_winsys;
struct pipe_fence_handle;
/* This currently just wraps dri_bo:
/* Not sure why the winsys needs this:
*/
#define BRW_BATCH_SIZE (32*1024)
/* Need a tiny bit of information inside the abstract buffer struct:
*/
struct brw_winsys_buffer {
struct brw_winsys_screen *sws;
void *bo;
unsigned offset;
unsigned *offset;
unsigned size;
};
@ -70,6 +73,8 @@ enum brw_buffer_type
BRW_BUFFER_TYPE_WM_SCRATCH,
BRW_BUFFER_TYPE_BATCH,
BRW_BUFFER_TYPE_STATE_CACHE,
BRW_BUFFER_TYPE_MAX /* Count of possible values */
};
struct brw_winsys_screen {
@ -103,12 +108,9 @@ struct brw_winsys_screen {
struct brw_winsys_buffer *b2);
int (*bo_exec)( struct brw_winsys_buffer *buffer,
unsigned bytes_used,
void *foo,
int a,
int b );
unsigned bytes_used );
void (*bo_subdata)(struct brw_winsys_buffer *buffer,
int (*bo_subdata)(struct brw_winsys_buffer *buffer,
size_t offset,
size_t size,
const void *data);
@ -142,14 +144,14 @@ struct brw_winsys_screen {
/**
* Destroy the winsys.
*/
void (*destroy)(struct brw_winsys *iws);
void (*destroy)(struct brw_winsys_screen *iws);
};
/**
* Create brw pipe_screen.
*/
struct pipe_screen *brw_create_screen(struct brw_winsys *iws, unsigned pci_id);
struct pipe_screen *brw_create_screen(struct brw_winsys_screen *iws, unsigned pci_id);
/**
* Create a brw pipe_context.
@ -162,19 +164,20 @@ struct pipe_context *brw_create_context(struct pipe_screen *screen);
* TODO UGLY
*/
struct pipe_texture;
boolean brw_get_texture_buffer_brw(struct pipe_texture *texture,
struct brw_winsys_buffer **buffer,
unsigned *stride);
boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture,
struct brw_winsys_buffer **buffer,
unsigned *stride);
/**
* Wrap a brw_winsys buffer with a texture blanket.
*
* TODO UGLY
*/
struct pipe_texture * brw_texture_blanket_ws(struct pipe_screen *screen,
const struct pipe_texture *tmplt,
const unsigned *stride,
struct brw_winsys_buffer *buffer);
struct pipe_texture *
brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
const struct pipe_texture *template,
const unsigned pitch,
struct brw_winsys_buffer *buffer);

2
src/gallium/drivers/i965/brw_wm_sampler_state.c
View file

@ -81,7 +81,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw,
entry->ss0 = sampler->ss0;
entry->ss1 = sampler->ss1;
entry->ss2.default_color_pointer = brw->wm.sdc_bo[i]->offset >> 5; /* reloc */
entry->ss2.default_color_pointer = brw->wm.sdc_bo[i]->offset[0] >> 5; /* reloc */
entry->ss3 = sampler->ss3;
/* Cube-maps on 965 and later must use the same wrap mode for all 3

6
src/gallium/drivers/i965/brw_wm_state.c
View file

@ -148,7 +148,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
memset(&wm, 0, sizeof(wm));
wm.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1;
wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset >> 6; /* reloc */
wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset[0] >> 6; /* reloc */
wm.thread1.depth_coef_urb_read_offset = 1;
wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
@ -159,7 +159,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
if (key->total_scratch != 0) {
wm.thread2.scratch_space_base_pointer =
brw->wm.scratch_bo->offset >> 10; /* reloc */
brw->wm.scratch_bo->offset[0] >> 10; /* reloc */
wm.thread2.per_thread_scratch_space = key->total_scratch / 1024 - 1;
} else {
wm.thread2.scratch_space_base_pointer = 0;
@ -179,7 +179,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
if (brw->wm.sampler_bo != NULL) {
/* reloc */
wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset >> 5;
wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset[0] >> 5;
} else {
wm.wm4.sampler_state_pointer = 0;
}

4
src/gallium/drivers/i965/brw_wm_surface_state.c
View file

@ -118,7 +118,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
*/
brw->sws->bo_emit_reloc(brw->wm.surf_bo[unit],
I915_GEM_DOMAIN_RENDER, 0,
ss.ss1.base_addr - surface->bo->offset, /* XXX */
ss.ss1.base_addr - surface->bo->offset[0], /* XXX */
offsetof(struct brw_surface_state, ss1),
surface->bo);
}
@ -150,7 +150,7 @@ brw_wm_get_binding_table(struct brw_context *brw)
int i;
for (i = 0; i < brw->wm.nr_surfaces; i++)
data[i] = brw->wm.surf_bo[i]->offset;
data[i] = brw->wm.surf_bo[i]->offset[0];
bind_bo = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND,
NULL, 0,

4
src/gallium/winsys/drm/i965/gem/Makefile
View file

@ -1,12 +1,10 @@
TOP = ../../../../../..
include $(TOP)/configs/current
LIBNAME = inteldrm
LIBNAME = i965drm
C_SOURCES = \
i965_drm_batchbuffer.c \
i965_drm_buffer.c \
i965_drm_fence.c \
i965_drm_api.c
LIBRARY_INCLUDES = $(shell pkg-config libdrm --cflags-only-I)

2
src/gallium/winsys/drm/i965/gem/SConscript
View file

@ -4,9 +4,7 @@ env = drienv.Clone()
i965drm_sources = [
'i965_drm_api.c',
'i965_drm_batchbuffer.c',
'i965_drm_buffer.c',
'i965_drm_fence.c',
]
i965drm = env.ConvenienceLibrary(

105
src/gallium/winsys/drm/i965/gem/i965_drm_api.c
View file

@ -1,11 +1,12 @@
#include <stdio.h>
#include "state_tracker/drm_api.h"
#include "i965_drm_winsys.h"
#include "util/u_memory.h"
#include "brw/brw_context.h" /* XXX: shouldn't be doing this */
#include "brw/brw_screen.h" /* XXX: shouldn't be doing this */
#include "i965/brw_context.h" /* XXX: shouldn't be doing this */
#include "i965/brw_screen.h" /* XXX: shouldn't be doing this */
#include "trace/tr_drm.h"
@ -15,7 +16,7 @@
static void
i965_drm_get_device_id(unsigned int *device_id)
i965_libdrm_get_device_id(unsigned int *device_id)
{
char path[512];
FILE *file;
@ -36,29 +37,28 @@ i965_drm_get_device_id(unsigned int *device_id)
fclose(file);
}
static struct i965_buffer *
i965_drm_buffer_from_handle(struct i965_drm_winsys *idws,
static struct i965_libdrm_buffer *
i965_libdrm_buffer_from_handle(struct i965_libdrm_winsys *idws,
const char* name, unsigned handle)
{
struct i965_drm_buffer *buf = CALLOC_STRUCT(i965_drm_buffer);
struct i965_libdrm_buffer *buf = CALLOC_STRUCT(i965_libdrm_buffer);
uint32_t tile = 0, swizzle = 0;
if (!buf)
return NULL;
buf->magic = 0xDEAD1337;
buf->bo = drm_i965_bo_gem_create_from_name(idws->pools.gem, name, handle);
buf->bo = drm_intel_bo_gem_create_from_name(idws->gem, name, handle);
buf->flinked = TRUE;
buf->flink = handle;
if (!buf->bo)
goto err;
drm_i965_bo_get_tiling(buf->bo, &tile, &swizzle);
if (tile != I965_TILE_NONE)
drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle);
if (tile != 0)
buf->map_gtt = TRUE;
return (struct i965_buffer *)buf;
return buf;
err:
FREE(buf);
@ -72,38 +72,43 @@ err:
static struct pipe_texture *
i965_drm_texture_from_shared_handle(struct drm_api *api,
i965_libdrm_texture_from_shared_handle(struct drm_api *api,
struct pipe_screen *screen,
struct pipe_texture *templ,
struct pipe_texture *template,
const char* name,
unsigned pitch,
unsigned handle)
{
struct i965_drm_winsys *idws = i965_drm_winsys(i965_screen(screen)->iws);
struct i965_buffer *buffer;
/* XXX: this is silly -- there should be a way to get directly from
* the "drm_api" struct to ourselves, without peering into
* unrelated code:
*/
struct i965_libdrm_winsys *idws = i965_libdrm_winsys(brw_screen(screen)->sws);
struct i965_libdrm_buffer *buffer;
buffer = i965_drm_buffer_from_handle(idws, name, handle);
buffer = i965_libdrm_buffer_from_handle(idws, name, handle);
if (!buffer)
return NULL;
return i965_texture_blanket_i965(screen, templ, pitch, buffer);
return brw_texture_blanket_winsys_buffer(screen, template, pitch, &buffer->base);
}
static boolean
i965_drm_shared_handle_from_texture(struct drm_api *api,
i965_libdrm_shared_handle_from_texture(struct drm_api *api,
struct pipe_screen *screen,
struct pipe_texture *texture,
unsigned *pitch,
unsigned *handle)
{
struct i965_drm_buffer *buf = NULL;
struct i965_buffer *buffer = NULL;
if (!i965_get_texture_buffer_i965(texture, &buffer, pitch))
struct i965_libdrm_buffer *buf = NULL;
struct brw_winsys_buffer *buffer = NULL;
if (!brw_texture_get_winsys_buffer(texture, &buffer, pitch))
return FALSE;
buf = i965_drm_buffer(buffer);
buf = i965_libdrm_buffer(buffer);
if (!buf->flinked) {
if (drm_i965_bo_flink(buf->bo, &buf->flink))
if (drm_intel_bo_flink(buf->bo, &buf->flink))
return FALSE;
buf->flinked = TRUE;
}
@ -114,36 +119,36 @@ i965_drm_shared_handle_from_texture(struct drm_api *api,
}
static boolean
i965_drm_local_handle_from_texture(struct drm_api *api,
i965_libdrm_local_handle_from_texture(struct drm_api *api,
struct pipe_screen *screen,
struct pipe_texture *texture,
unsigned *pitch,
unsigned *handle)
{
struct i965_buffer *buffer = NULL;
if (!i965_get_texture_buffer_i965(texture, &buffer, pitch))
struct brw_winsys_buffer *buffer = NULL;
if (!brw_texture_get_winsys_buffer(texture, &buffer, pitch))
return FALSE;
*handle = i965_drm_buffer(buffer)->bo->handle;
*handle = i965_libdrm_buffer(buffer)->bo->handle;
return TRUE;
}
static void
i965_drm_winsys_destroy(struct i965_winsys *iws)
i965_libdrm_winsys_destroy(struct brw_winsys_screen *iws)
{
struct i965_drm_winsys *idws = i965_drm_winsys(iws);
struct i965_libdrm_winsys *idws = i965_libdrm_winsys(iws);
drm_i965_bufmgr_destroy(idws->pools.gem);
drm_intel_bufmgr_destroy(idws->gem);
FREE(idws);
}
static struct pipe_screen *
i965_drm_create_screen(struct drm_api *api, int drmFD,
i965_libdrm_create_screen(struct drm_api *api, int drmFD,
struct drm_create_screen_arg *arg)
{
struct i965_drm_winsys *idws;
struct i965_libdrm_winsys *idws;
unsigned int deviceID;
if (arg != NULL) {
@ -155,35 +160,31 @@ i965_drm_create_screen(struct drm_api *api, int drmFD,
}
}
idws = CALLOC_STRUCT(i965_drm_winsys);
idws = CALLOC_STRUCT(i965_libdrm_winsys);
if (!idws)
return NULL;
i965_drm_get_device_id(&deviceID);
i965_libdrm_get_device_id(&deviceID);
i965_drm_winsys_init_batchbuffer_functions(idws);
i965_drm_winsys_init_buffer_functions(idws);
i965_drm_winsys_init_fence_functions(idws);
i965_libdrm_winsys_init_buffer_functions(idws);
idws->fd = drmFD;
idws->id = deviceID;
idws->max_batch_size = 16 * 4096;
idws->base.destroy = i965_drm_winsys_destroy;
idws->base.destroy = i965_libdrm_winsys_destroy;
idws->pools.gem = drm_i965_bufmgr_gem_init(idws->fd, idws->max_batch_size);
drm_i965_bufmgr_gem_enable_reuse(idws->pools.gem);
idws->gem = drm_intel_bufmgr_gem_init(idws->fd, BRW_BATCH_SIZE);
drm_intel_bufmgr_gem_enable_reuse(idws->gem);
idws->softpipe = FALSE;
idws->dump_cmd = debug_get_bool_option("I965_DUMP_CMD", FALSE);
return i965_create_screen(&idws->base, deviceID);
return brw_create_screen(&idws->base, deviceID);
}
static struct pipe_context *
i965_drm_create_context(struct drm_api *api, struct pipe_screen *screen)
i965_libdrm_create_context(struct drm_api *api, struct pipe_screen *screen)
{
return i965_create_context(screen);
return brw_create_context(screen);
}
static void
@ -192,18 +193,18 @@ destroy(struct drm_api *api)
}
struct drm_api i965_drm_api =
struct drm_api i965_libdrm_api =
{
.create_context = i965_drm_create_context,
.create_screen = i965_drm_create_screen,
.texture_from_shared_handle = i965_drm_texture_from_shared_handle,
.shared_handle_from_texture = i965_drm_shared_handle_from_texture,
.local_handle_from_texture = i965_drm_local_handle_from_texture,
.create_context = i965_libdrm_create_context,
.create_screen = i965_libdrm_create_screen,
.texture_from_shared_handle = i965_libdrm_texture_from_shared_handle,
.shared_handle_from_texture = i965_libdrm_shared_handle_from_texture,
.local_handle_from_texture = i965_libdrm_local_handle_from_texture,
.destroy = destroy,
};
struct drm_api *
drm_api_create()
{
return trace_drm_create(&i965_drm_api);
return trace_drm_create(&i965_libdrm_api);
}

244
src/gallium/winsys/drm/i965/gem/i965_drm_batchbuffer.c
View file

@ -1,244 +0,0 @@
#include "intel_drm_winsys.h"
#include "util/u_memory.h"
#include "i915_drm.h"
#define BATCH_RESERVED 16
#define INTEL_DEFAULT_RELOCS 100
#define INTEL_MAX_RELOCS 400
#define INTEL_BATCH_NO_CLIPRECTS 0x1
#define INTEL_BATCH_CLIPRECTS 0x2
#undef INTEL_RUN_SYNC
#undef INTEL_MAP_BATCHBUFFER
#undef INTEL_MAP_GTT
#define INTEL_ALWAYS_FLUSH
struct intel_drm_batchbuffer
{
struct intel_batchbuffer base;
size_t actual_size;
drm_intel_bo *bo;
};
static INLINE struct intel_drm_batchbuffer *
intel_drm_batchbuffer(struct intel_batchbuffer *batch)
{
return (struct intel_drm_batchbuffer *)batch;
}
static void
intel_drm_batchbuffer_reset(struct intel_drm_batchbuffer *batch)
{
struct intel_drm_winsys *idws = intel_drm_winsys(batch->base.iws);
int ret;
if (batch->bo)
drm_intel_bo_unreference(batch->bo);
batch->bo = drm_intel_bo_alloc(idws->pools.gem,
"gallium3d_batchbuffer",
batch->actual_size,
4096);
#ifdef INTEL_MAP_BATCHBUFFER
#ifdef INTEL_MAP_GTT
ret = drm_intel_gem_bo_map_gtt(batch->bo);
#else
ret = drm_intel_bo_map(batch->bo, TRUE);
#endif
assert(ret == 0);
batch->base.map = batch->bo->virtual;
#else
(void)ret;
#endif
memset(batch->base.map, 0, batch->actual_size);
batch->base.ptr = batch->base.map;
batch->base.size = batch->actual_size - BATCH_RESERVED;
batch->base.relocs = 0;
}
static struct intel_batchbuffer *
intel_drm_batchbuffer_create(struct intel_winsys *iws)
{
struct intel_drm_winsys *idws = intel_drm_winsys(iws);
struct intel_drm_batchbuffer *batch = CALLOC_STRUCT(intel_drm_batchbuffer);
batch->actual_size = idws->max_batch_size;
#ifdef INTEL_MAP_BATCHBUFFER
batch->base.map = NULL;
#else
batch->base.map = MALLOC(batch->actual_size);
#endif
batch->base.ptr = NULL;
batch->base.size = 0;
batch->base.relocs = 0;
batch->base.max_relocs = 300;/*INTEL_DEFAULT_RELOCS;*/
batch->base.iws = iws;
intel_drm_batchbuffer_reset(batch);
return &batch->base;
}
static int
intel_drm_batchbuffer_reloc(struct intel_batchbuffer *ibatch,
struct intel_buffer *buffer,
enum intel_buffer_usage usage,
unsigned pre_add)
{
struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch);
unsigned write_domain = 0;
unsigned read_domain = 0;
unsigned offset;
int ret = 0;
assert(batch->base.relocs < batch->base.max_relocs);
if (usage == INTEL_USAGE_SAMPLER) {
write_domain = 0;
read_domain = I915_GEM_DOMAIN_SAMPLER;
} else if (usage == INTEL_USAGE_RENDER) {
write_domain = I915_GEM_DOMAIN_RENDER;
read_domain = I915_GEM_DOMAIN_RENDER;
} else if (usage == INTEL_USAGE_2D_TARGET) {
write_domain = I915_GEM_DOMAIN_RENDER;
read_domain = I915_GEM_DOMAIN_RENDER;
} else if (usage == INTEL_USAGE_2D_SOURCE) {
write_domain = 0;
read_domain = I915_GEM_DOMAIN_RENDER;
} else if (usage == INTEL_USAGE_VERTEX) {
write_domain = 0;
read_domain = I915_GEM_DOMAIN_VERTEX;
} else {
assert(0);
return -1;
}
offset = (unsigned)(batch->base.ptr - batch->base.map);
ret = drm_intel_bo_emit_reloc(batch->bo, offset,
intel_bo(buffer), pre_add,
read_domain,
write_domain);
((uint32_t*)batch->base.ptr)[0] = intel_bo(buffer)->offset + pre_add;
batch->base.ptr += 4;
if (!ret)
batch->base.relocs++;
return ret;
}
static void
intel_drm_batchbuffer_flush(struct intel_batchbuffer *ibatch,
struct pipe_fence_handle **fence)
{
struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch);
unsigned used = 0;
int ret = 0;
int i;
assert(intel_batchbuffer_space(ibatch) >= 0);
used = batch->base.ptr - batch->base.map;
assert((used & 3) == 0);
#ifdef INTEL_ALWAYS_FLUSH
/* MI_FLUSH | FLUSH_MAP_CACHE */
intel_batchbuffer_dword(ibatch, (0x4<<23)|(1<<0));
used += 4;
#endif
if ((used & 4) == 0) {
/* MI_NOOP */
intel_batchbuffer_dword(ibatch, 0);
}
/* MI_BATCH_BUFFER_END */
intel_batchbuffer_dword(ibatch, (0xA<<23));
used = batch->base.ptr - batch->base.map;
assert((used & 4) == 0);
#ifdef INTEL_MAP_BATCHBUFFER
#ifdef INTEL_MAP_GTT
drm_intel_gem_bo_unmap_gtt(batch->bo);
#else
drm_intel_bo_unmap(batch->bo);
#endif
#else
drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map);
#endif
/* Do the sending to HW */
ret = drm_intel_bo_exec(batch->bo, used, NULL, 0, 0);
assert(ret == 0);
if (intel_drm_winsys(ibatch->iws)->dump_cmd) {
unsigned *ptr;
drm_intel_bo_map(batch->bo, FALSE);
ptr = (unsigned*)batch->bo->virtual;
debug_printf("%s:\n", __func__);
for (i = 0; i < used / 4; i++, ptr++) {
debug_printf("\t%08x: %08x\n", i*4, *ptr);
}
drm_intel_bo_unmap(batch->bo);
} else {
#ifdef INTEL_RUN_SYNC
drm_intel_bo_map(batch->bo, FALSE);
drm_intel_bo_unmap(batch->bo);
#endif
}
if (fence) {
ibatch->iws->fence_reference(ibatch->iws, fence, NULL);
#ifdef INTEL_RUN_SYNC
/* we run synced to GPU so just pass null */
(*fence) = intel_drm_fence_create(NULL);
#else
(*fence) = intel_drm_fence_create(batch->bo);
#endif
}
intel_drm_batchbuffer_reset(batch);
}
static void
intel_drm_batchbuffer_destroy(struct intel_batchbuffer *ibatch)
{
struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch);
if (batch->bo)
drm_intel_bo_unreference(batch->bo);
#ifndef INTEL_MAP_BATCHBUFFER
FREE(batch->base.map);
#endif
FREE(batch);
}
void intel_drm_winsys_init_batchbuffer_functions(struct intel_drm_winsys *idws)
{
idws->base.batchbuffer_create = intel_drm_batchbuffer_create;
idws->base.batchbuffer_reloc = intel_drm_batchbuffer_reloc;
idws->base.batchbuffer_flush = intel_drm_batchbuffer_flush;
idws->base.batchbuffer_destroy = intel_drm_batchbuffer_destroy;
}

301
src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c
View file

@ -3,48 +3,58 @@
#include "util/u_memory.h"
#include "i915_drm.h"
#include "intel_bufmgr.h"
static struct intel_buffer *
intel_drm_buffer_create(struct intel_winsys *iws,
unsigned size, unsigned alignment,
enum intel_buffer_type type)
const char *names[BRW_BUFFER_TYPE_MAX] = {
"texture",
"scanout",
"vertex",
"curbe",
"query",
"shader_constants",
"wm_scratch",
"batch",
"state_cache",
};
static struct brw_winsys_buffer *
i965_libdrm_bo_alloc( struct brw_winsys_screen *sws,
enum brw_buffer_type type,
unsigned size,
unsigned alignment )
{
struct intel_drm_buffer *buf = CALLOC_STRUCT(intel_drm_buffer);
struct intel_drm_winsys *idws = intel_drm_winsys(iws);
drm_intel_bufmgr *pool;
char *name;
struct i965_libdrm_winsys *idws = i965_libdrm_winsys(sws);
struct i965_libdrm_buffer *buf;
buf = CALLOC_STRUCT(i965_libdrm_buffer);
if (!buf)
return NULL;
buf->magic = 0xDEAD1337;
buf->flinked = FALSE;
buf->flink = 0;
buf->map_gtt = FALSE;
if (type == INTEL_NEW_TEXTURE) {
name = "gallium3d_texture";
pool = idws->pools.gem;
} else if (type == INTEL_NEW_VERTEX) {
name = "gallium3d_vertex";
pool = idws->pools.gem;
switch (type) {
case BRW_BUFFER_TYPE_TEXTURE:
break;
case BRW_BUFFER_TYPE_VERTEX:
buf->map_gtt = TRUE;
} else if (type == INTEL_NEW_SCANOUT) {
name = "gallium3d_scanout";
pool = idws->pools.gem;
break;
case BRW_BUFFER_TYPE_SCANOUT:
buf->map_gtt = TRUE;
} else {
assert(0);
name = "gallium3d_unknown";
pool = idws->pools.gem;
break;
default:
break;
}
buf->bo = drm_intel_bo_alloc(pool, name, size, alignment);
buf->bo = drm_intel_bo_alloc(idws->gem,
names[type],
size,
alignment);
if (!buf->bo)
goto err;
return (struct intel_buffer *)buf;
buf->base.offset = &buf->bo->offset;
buf->base.size = size;
return &buf->base;
err:
assert(0);
@ -52,103 +62,186 @@ err:
return NULL;
}
static int
intel_drm_buffer_set_fence_reg(struct intel_winsys *iws,
struct intel_buffer *buffer,
unsigned stride,
enum intel_buffer_tile tile)
{
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
assert(I915_TILING_NONE == INTEL_TILE_NONE);
assert(I915_TILING_X == INTEL_TILE_X);
assert(I915_TILING_Y == INTEL_TILE_Y);
if (tile != INTEL_TILE_NONE) {
assert(buf->map_count == 0);
buf->map_gtt = TRUE;
/* Reference and unreference buffers:
*/
static void
i965_libdrm_bo_reference( struct brw_winsys_buffer *buffer )
{
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
/* I think we have to refcount ourselves and then just pass through
* the final dereference to the bo on destruction.
*/
buf->cheesy_refcount++;
}
static void
i965_libdrm_bo_unreference( struct brw_winsys_buffer *buffer )
{
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
if (--buf->cheesy_refcount == 0) {
drm_intel_bo_unreference(buf->bo);
FREE(buffer);
}
}
/* XXX: parameter names!!
*/
static int
i965_libdrm_bo_emit_reloc( struct brw_winsys_buffer *buffer,
unsigned domain,
unsigned a,
unsigned b,
unsigned offset,
struct brw_winsys_buffer *buffer2)
{
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
struct i965_libdrm_buffer *buf2 = i965_libdrm_buffer(buffer2);
int ret;
ret = dri_bo_emit_reloc( buf->bo, domain, a, b, offset, buf2->bo );
if (ret)
return -1;
return 0;
}
static int
i965_libdrm_bo_exec( struct brw_winsys_buffer *buffer,
unsigned bytes_used )
{
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
int ret;
ret = dri_bo_exec(buf->bo, bytes_used, NULL, 0, 0);
if (ret)
return -1;
return 0;
}
static int
i965_libdrm_bo_subdata(struct brw_winsys_buffer *buffer,
size_t offset,
size_t size,
const void *data)
{
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
int ret;
/* XXX: use bo_map_gtt/memcpy/unmap_gtt under some circumstances???
*/
ret = drm_intel_bo_subdata(buf->bo, offset, size, (void*)data);
if (ret)
return -1;
return 0;
}
static boolean
i965_libdrm_bo_is_busy(struct brw_winsys_buffer *buffer)
{
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
return drm_intel_bo_busy(buf->bo);
}
static boolean
i965_libdrm_bo_references(struct brw_winsys_buffer *a,
struct brw_winsys_buffer *b)
{
struct i965_libdrm_buffer *bufa = i965_libdrm_buffer(a);
struct i965_libdrm_buffer *bufb = i965_libdrm_buffer(b);
/* XXX: can't find this func:
*/
return drm_intel_bo_references(bufa->bo, bufb->bo);
}
/* XXX: couldn't this be handled by returning true/false on
* bo_emit_reloc?
*/
static boolean
i965_libdrm_check_aperture_space( struct brw_winsys_screen *iws,
struct brw_winsys_buffer **buffers,
unsigned count )
{
static drm_intel_bo *bos[128];
int i;
if (count > Elements(bos)) {
assert(0);
return FALSE;
}
return drm_intel_bo_set_tiling(buf->bo, &tile, stride);
for (i = 0; i < count; i++)
bos[i] = i965_libdrm_buffer(buffers[i])->bo;
return dri_bufmgr_check_aperture_space(bos, count);
}
/**
* Map a buffer.
*/
static void *
intel_drm_buffer_map(struct intel_winsys *iws,
struct intel_buffer *buffer,
boolean write)
i965_libdrm_bo_map(struct brw_winsys_buffer *buffer,
boolean write)
{
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
drm_intel_bo *bo = intel_bo(buffer);
int ret = 0;
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
int ret;
assert(bo);
if (buf->map_count)
goto out;
if (buf->map_gtt)
ret = drm_intel_gem_bo_map_gtt(bo);
else
ret = drm_intel_bo_map(bo, write);
buf->ptr = bo->virtual;
assert(ret == 0);
out:
if (ret)
return NULL;
if (!buf->map_count) {
if (buf->map_gtt) {
ret = drm_intel_gem_bo_map_gtt(buf->bo);
if (ret)
return NULL;
}
else {
ret = drm_intel_bo_map(buf->bo, write);
if (ret)
return NULL;
}
}
buf->map_count++;
return buf->ptr;
return buf->bo->virtual;
}
static void
intel_drm_buffer_unmap(struct intel_winsys *iws,
struct intel_buffer *buffer)
/**
* Unmap a buffer.
*/
static void
i965_libdrm_bo_unmap(struct brw_winsys_buffer *buffer)
{
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
if (--buf->map_count)
if (--buf->map_count > 0)
return;
if (buf->map_gtt)
drm_intel_gem_bo_unmap_gtt(intel_bo(buffer));
drm_intel_gem_bo_unmap_gtt(buf->bo);
else
drm_intel_bo_unmap(intel_bo(buffer));
drm_intel_bo_unmap(buf->bo);
}
static int
intel_drm_buffer_write(struct intel_winsys *iws,
struct intel_buffer *buffer,
size_t offset,
size_t size,
const void *data)
{
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
return drm_intel_bo_subdata(buf->bo, offset, size, (void*)data);
}
static void
intel_drm_buffer_destroy(struct intel_winsys *iws,
struct intel_buffer *buffer)
{
drm_intel_bo_unreference(intel_bo(buffer));
#ifdef DEBUG
intel_drm_buffer(buffer)->magic = 0;
intel_drm_buffer(buffer)->bo = NULL;
#endif
FREE(buffer);
}
void
intel_drm_winsys_init_buffer_functions(struct intel_drm_winsys *idws)
i965_libdrm_winsys_init_buffer_functions(struct i965_libdrm_winsys *idws)
{
idws->base.buffer_create = intel_drm_buffer_create;
idws->base.buffer_set_fence_reg = intel_drm_buffer_set_fence_reg;
idws->base.buffer_map = intel_drm_buffer_map;
idws->base.buffer_unmap = intel_drm_buffer_unmap;
idws->base.buffer_write = intel_drm_buffer_write;
idws->base.buffer_destroy = intel_drm_buffer_destroy;
idws->base.bo_alloc = i965_libdrm_bo_alloc;
idws->base.bo_reference = i965_libdrm_bo_reference;
idws->base.bo_unreference = i965_libdrm_bo_unreference;
idws->base.bo_emit_reloc = i965_libdrm_bo_emit_reloc;
idws->base.bo_exec = i965_libdrm_bo_exec;
idws->base.bo_subdata = i965_libdrm_bo_subdata;
idws->base.bo_is_busy = i965_libdrm_bo_is_busy;
idws->base.bo_references = i965_libdrm_bo_references;
idws->base.check_aperture_space = i965_libdrm_check_aperture_space;
idws->base.bo_map = i965_libdrm_bo_map;
idws->base.bo_unmap = i965_libdrm_bo_unmap;
}

81
src/gallium/winsys/drm/i965/gem/i965_drm_fence.c
View file

@ -1,81 +0,0 @@
#include "intel_drm_winsys.h"
#include "util/u_memory.h"
#include "pipe/p_refcnt.h"
/**
* Because gem does not have fence's we have to create our own fences.
*
* They work by keeping the batchbuffer around and checking if that has
* been idled. If bo is NULL fence has expired.
*/
struct intel_drm_fence
{
struct pipe_reference reference;
drm_intel_bo *bo;
};
struct pipe_fence_handle *
intel_drm_fence_create(drm_intel_bo *bo)
{
struct intel_drm_fence *fence = CALLOC_STRUCT(intel_drm_fence);
pipe_reference_init(&fence->reference, 1);
/* bo is null if fence already expired */
if (bo) {
drm_intel_bo_reference(bo);
fence->bo = bo;
}
return (struct pipe_fence_handle *)fence;
}
static void
intel_drm_fence_reference(struct intel_winsys *iws,
struct pipe_fence_handle **ptr,
struct pipe_fence_handle *fence)
{
struct intel_drm_fence *old = (struct intel_drm_fence *)*ptr;
struct intel_drm_fence *f = (struct intel_drm_fence *)fence;
if (pipe_reference((struct pipe_reference**)ptr, &f->reference)) {
if (old->bo)
drm_intel_bo_unreference(old->bo);
FREE(old);
}
}
static int
intel_drm_fence_signalled(struct intel_winsys *iws,
struct pipe_fence_handle *fence)
{
assert(0);
return 0;
}
static int
intel_drm_fence_finish(struct intel_winsys *iws,
struct pipe_fence_handle *fence)
{
struct intel_drm_fence *f = (struct intel_drm_fence *)fence;
/* fence already expired */
if (!f->bo)
return 0;
drm_intel_bo_wait_rendering(f->bo);
drm_intel_bo_unreference(f->bo);
f->bo = NULL;
return 0;
}
void
intel_drm_winsys_init_fence_functions(struct intel_drm_winsys *idws)
{
idws->base.fence_reference = intel_drm_fence_reference;
idws->base.fence_signalled = intel_drm_fence_signalled;
idws->base.fence_finish = intel_drm_fence_finish;
}

50
src/gallium/winsys/drm/i965/gem/i965_drm_winsys.h
View file

@ -2,56 +2,45 @@
#ifndef INTEL_DRM_WINSYS_H
#define INTEL_DRM_WINSYS_H
#include "i965/intel_batchbuffer.h"
#include "i965/brw_winsys.h"
#include "drm.h"
#include "intel_bufmgr.h"
/*
* Winsys
*/
struct intel_drm_winsys
struct i965_libdrm_winsys
{
struct intel_winsys base;
struct brw_winsys_screen base;
drm_intel_bufmgr *gem;
boolean softpipe;
boolean dump_cmd;
int fd; /**< Drm file discriptor */
unsigned id;
size_t max_batch_size;
struct {
drm_intel_bufmgr *gem;
} pools;
};
static INLINE struct intel_drm_winsys *
intel_drm_winsys(struct intel_winsys *iws)
static INLINE struct i965_libdrm_winsys *
i965_libdrm_winsys(struct brw_winsys_screen *iws)
{
return (struct intel_drm_winsys *)iws;
return (struct i965_libdrm_winsys *)iws;
}
struct intel_drm_winsys * intel_drm_winsys_create(int fd, unsigned pci_id);
struct pipe_fence_handle * intel_drm_fence_create(drm_intel_bo *bo);
struct i965_libdrm_winsys *i965_libdrm_winsys_create(int fd, unsigned pci_id);
void intel_drm_winsys_init_batchbuffer_functions(struct intel_drm_winsys *idws);
void intel_drm_winsys_init_buffer_functions(struct intel_drm_winsys *idws);
void intel_drm_winsys_init_fence_functions(struct intel_drm_winsys *idws);
void i965_libdrm_winsys_init_buffer_functions(struct i965_libdrm_winsys *idws);
/*
* Buffer
/* Buffer.
*/
struct intel_drm_buffer {
unsigned magic;
struct i965_libdrm_buffer {
struct brw_winsys_buffer base;
drm_intel_bo *bo;
@ -61,18 +50,15 @@ struct intel_drm_buffer {
boolean flinked;
unsigned flink;
unsigned cheesy_refcount;
};
static INLINE struct intel_drm_buffer *
intel_drm_buffer(struct intel_buffer *buffer)
static INLINE struct i965_libdrm_buffer *
i965_libdrm_buffer(struct brw_winsys_buffer *buffer)
{
return (struct intel_drm_buffer *)buffer;
return (struct i965_libdrm_buffer *)buffer;
}
static INLINE drm_intel_bo *
intel_bo(struct intel_buffer *buffer)
{
return intel_drm_buffer(buffer)->bo;
}
#endif