fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-06 15:20:17 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

isl: implement linear tiling row pitch requirement for display

Browse source 
We're missing a requirement for alignment of row pitch for the display
HW. In linear tiling, the row pitch must be a 64bytes aligned.

v2: Use correct formula to align to 64bytes (Chad)

v3: Matching {} (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
This commit is contained in:
Lionel Landwerlin 2019-10-14 21:26:18 +03:00 • committed by Marge Bot
parent f778c48869
commit 157a3cf3ec
1 changed files with 14 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

17
src/intel/isl/isl.c
View file

@ -1398,16 +1398,27 @@ isl_calc_row_pitch_alignment(const struct isl_device *dev,
*/
const struct isl_format_layout *fmtl = isl_format_get_layout(surf_info->format);
const uint32_t bs = fmtl->bpb / 8;
uint32_t alignment;
if (surf_info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) {
if (isl_format_is_yuv(surf_info->format)) {
return 2 * bs;
alignment = 2 * bs;
} else {
return bs;
alignment = bs;
}
} else {
alignment = 1;
}
return 1;
/* From the Broadwell PRM >> Volume 2c: Command Reference: Registers >>
* PRI_STRIDE Stride (p1254):
*
* "When using linear memory, this must be at least 64 byte aligned."
*/
if (surf_info->usage & ISL_SURF_USAGE_DISPLAY_BIT)
alignment = isl_align(alignment, 64);
return alignment;
}
static uint32_t