broadcom/compiler: simplify v3d_vir_emit_tex

In the past where backends had to deal with nir_register we needed
a specific path for them here because nir_def_components_read only
worked on ssa defs, but now that we got rid of nir_register we
only have nir_def and we don't need to go out of our way to do this
and we can just always use nir_def_components_read.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978>
This commit is contained in:
Iago Toral Quiroga 2024-05-07 12:01:23 +02:00
parent c24a149d2d
commit 1545dc94b4

View file

@ -248,29 +248,9 @@ v3d_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr)
/* Limit the number of channels returned to both how many the NIR
* instruction writes and how many the instruction could produce.
*/
nir_intrinsic_instr *store = nir_store_reg_for_def(&instr->def);
if (store == NULL) {
p0_unpacked.return_words_of_texture_data =
nir_def_components_read(&instr->def);
} else {
nir_def *reg = store->src[1].ssa;
nir_intrinsic_instr *decl = nir_reg_get_decl(reg);
unsigned reg_num_components =
nir_intrinsic_num_components(decl);
/* For the non-ssa case we don't have a full equivalent to
* nir_def_components_read. This is a problem for the 16
* bit case. nir_lower_tex will not change the destination as
* nir_tex_instr_dest_size will still return 4. The driver is
* just expected to not store on other channels, so we
* manually ensure that here.
*/
uint32_t num_components = output_type_32_bit ?
MIN2(reg_num_components, 4) :
MIN2(reg_num_components, 2);
p0_unpacked.return_words_of_texture_data = (1 << num_components) - 1;
}
uint32_t components_read = nir_def_components_read(&instr->def);
p0_unpacked.return_words_of_texture_data = output_type_32_bit ?
(components_read & 0xf): (components_read & 0x3);
assert(p0_unpacked.return_words_of_texture_data != 0);
struct V3D42_TMU_CONFIG_PARAMETER_2 p2_unpacked = {