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intel/ir: Represent logical edge of BREAK instruction.

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Currently only the physical back-edge is represented, which
incidentally also leads to the exit block of the loop, but we need the
direct logical edge in addition for our logical CFG representation to
be complete.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
This commit is contained in:
Francisco Jerez 2019-08-05 18:21:05 -07:00
parent c344c92b31
commit 152754665a
1 changed files with 1 additions and 0 deletions
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src/intel/compiler/brw_cfg.cpp
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@ -352,6 +352,7 @@ cfg_t::cfg_t(exec_list *instructions)
*/
assert(cur_do != NULL);
cur->add_successor(mem_ctx, cur_do, bblock_link_physical);
cur->add_successor(mem_ctx, cur_while, bblock_link_logical);
next = new_block();
if (inst->predicate)