fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-02-20 23:10:30 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

aco/assembler: fix MTBUF opcode encoding on GFX11

Browse source 
We have accidentally set the tfe bit for some opcodes.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29692>
This commit is contained in:
Daniel Schürmann 2024-06-12 09:05:38 +02:00 • committed by Marge Bot
parent 8a4e530f9d
commit 14f4906e53
2 changed files with 1 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/amd/ci/radv-navi31-aco-fails.txt
View file

@ -3,8 +3,3 @@ dEQP-VK.api.version_check.unavailable_entry_points,Fail
# New CTS failures in 1.3.8.0
dEQP-VK.api.get_device_proc_addr.non_enabled,Fail
# Regression in !29235
# https://gitlab.freedesktop.org/mesa/mesa/-/issues/11292
dEQP-VK.pipeline.monolithic.vertex_input.max_attributes.32_attributes.binding_one_to_one.interleaved,Fail
dEQP-VK.pipeline.pipeline_library.vertex_input.max_attributes.32_attributes.binding_one_to_one.interleaved,Fail

2
src/amd/compiler/aco_assembler.cpp
View file

@ -674,7 +674,7 @@ emit_mtbuf_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction
encoding |= reg(ctx, instr->definitions[0], 8) << 8;
encoding |= reg(ctx, instr->operands[1], 8);
if (ctx.gfx_level >= GFX10) {
if (ctx.gfx_level >= GFX10 && ctx.gfx_level < GFX11) {
encoding |= (((opcode & 0x08) >> 3) << 21); /* MSB of 4-bit OPCODE */
}