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pan/mdg: Identify barrier out-of-order field
All barrier types are implied regardless, this is an optimization for out-of-order. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6321>
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3 changed files with 6 additions and 28 deletions
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@ -1391,18 +1391,8 @@ print_texture_barrier(FILE *fp, uint32_t *word)
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if (barrier->zero5)
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fprintf(fp, "/* zero4 = 0x%" PRIx64 " */ ", barrier->zero5);
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/* Control barriers are always implied, so include for obviousness */
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fprintf(fp, " control");
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if (barrier->buffer)
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fprintf(fp, " | buffer");
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if (barrier->shared)
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fprintf(fp, " | shared");
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if (barrier->stack)
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fprintf(fp, " | stack");
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if (barrier->out_of_order)
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fprintf(fp, ".ooo%u", barrier->out_of_order);
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fprintf(fp, "\n");
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}
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@ -657,9 +657,6 @@ enum mali_sampler_type {
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MALI_SAMPLER_SIGNED = 0x3, /* isampler */
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};
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#define MIDGARD_BARRIER_BUFFER (1 << 0)
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#define MIDGARD_BARRIER_SHARED (1 << 1)
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typedef struct
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__attribute__((__packed__))
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{
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@ -722,10 +719,8 @@ __attribute__((__packed__))
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unsigned swizzle : 8;
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/* For barriers, control barriers are implied regardless, but these
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* bits also enable memory barriers of various types. For regular
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* textures, these indicate how many bundles after this texture op may
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* be executed in parallel with this op. We may execute only ALU and
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/* These indicate how many bundles after this texture op may be
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* executed in parallel with this op. We may execute only ALU and
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* ld/st in parallel (not other textures), and obviously there cannot
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* be any dependency (the blob appears to forbid even accessing other
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* channels of a given texture register). */
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@ -801,10 +796,8 @@ __attribute__((__packed__))
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unsigned zero2 : 14;
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unsigned zero3 : 24;
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unsigned buffer : 1;
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unsigned shared : 1;
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unsigned stack : 1;
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unsigned zero4 : 5;
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unsigned out_of_order : 4;
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unsigned zero4 : 4;
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uint64_t zero5;
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} midgard_texture_barrier_word;
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@ -1570,11 +1570,6 @@ emit_control_barrier(compiler_context *ctx)
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.dest = ~0,
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.src = { ~0, ~0, ~0, ~0 },
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.op = TEXTURE_OP_BARRIER,
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.texture = {
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/* TODO: optimize */
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.out_of_order = MIDGARD_BARRIER_BUFFER |
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MIDGARD_BARRIER_SHARED ,
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}
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};
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emit_mir_instruction(ctx, ins);
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