From 14e1b9ee69b20a375baa6d9a360a92a84b90dd0a Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Wed, 7 Sep 2022 14:11:05 -0700 Subject: [PATCH] intel/fs/xe2+: Update TES payload setup for Xe2 reg size. Reviewed-by: Caio Oliveira Reviewed-by: Jordan Justen Part-of: --- src/intel/compiler/brw_fs.cpp | 2 +- src/intel/compiler/brw_fs.h | 2 +- src/intel/compiler/brw_fs_thread_payload.cpp | 16 +++++++++++----- 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index b875bc677d0..8ccabc819e4 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -7145,7 +7145,7 @@ fs_visitor::run_tes() { assert(stage == MESA_SHADER_TESS_EVAL); - payload_ = new tes_thread_payload(); + payload_ = new tes_thread_payload(*this); emit_nir_code(); diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 2c2bb6b317c..fc8f0ed7da2 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -112,7 +112,7 @@ struct tcs_thread_payload : public thread_payload { }; struct tes_thread_payload : public thread_payload { - tes_thread_payload(); + tes_thread_payload(const fs_visitor &v); fs_reg patch_urb_input; fs_reg primitive_id; diff --git a/src/intel/compiler/brw_fs_thread_payload.cpp b/src/intel/compiler/brw_fs_thread_payload.cpp index 1b6ff46deff..89acc4ad5e6 100644 --- a/src/intel/compiler/brw_fs_thread_payload.cpp +++ b/src/intel/compiler/brw_fs_thread_payload.cpp @@ -77,20 +77,26 @@ tcs_thread_payload::tcs_thread_payload(const fs_visitor &v) } } -tes_thread_payload::tes_thread_payload() +tes_thread_payload::tes_thread_payload(const fs_visitor &v) { + unsigned r = 0; + /* R0: Thread Header. */ patch_urb_input = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD); primitive_id = brw_vec1_grf(0, 1); + r += reg_unit(v.devinfo); /* R1-3: gl_TessCoord.xyz. */ - for (unsigned i = 0; i < 3; i++) - coords[i] = brw_vec8_grf(1 + i, 0); + for (unsigned i = 0; i < 3; i++) { + coords[i] = brw_vec8_grf(r, 0); + r += reg_unit(v.devinfo); + } /* R4: URB output handles. */ - urb_output = brw_ud8_grf(4, 0); + urb_output = brw_ud8_grf(r, 0); + r += reg_unit(v.devinfo); - num_regs = 5; + num_regs = r; } gs_thread_payload::gs_thread_payload(const fs_visitor &v)