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radeonsi: add shader info for frag coord and sample pos read

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To construct spi_ps_input when ACO compilation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
This commit is contained in:
Qiang Yu 2023-04-12 14:53:47 +08:00 • committed by Marge Bot
parent 326b027b25
commit 14d2b12390
2 changed files with 10 additions and 0 deletions
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4
src/gallium/drivers/radeonsi/si_shader.h
View file

@ -496,6 +496,10 @@ struct si_shader_info {
* texunit + 1.
*/
uint8_t writes_1_if_tex_is_1;
/* frag coord and sample pos per component read mask. */
uint8_t reads_frag_coord_mask;
uint8_t reads_sample_pos_mask;
};
/* A shader selector is a gallium CSO and contains shader variants and

6
src/gallium/drivers/radeonsi/si_shader_info.c
View file

@ -557,6 +557,12 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
if (intr->intrinsic == nir_intrinsic_load_barycentric_at_sample)
info->uses_interp_at_sample = true;
break;
case nir_intrinsic_load_frag_coord:
info->reads_frag_coord_mask |= nir_ssa_def_components_read(&intr->dest.ssa);
break;
case nir_intrinsic_load_sample_pos:
info->reads_sample_pos_mask |= nir_ssa_def_components_read(&intr->dest.ssa);
break;
case nir_intrinsic_load_input:
case nir_intrinsic_load_per_vertex_input:
case nir_intrinsic_load_input_vertex: