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i965: Fix up some Sandybridge define checks for the structure rebase.
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parent
591a996ab6
commit
1489f108f4
2 changed files with 5 additions and 3 deletions
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@ -536,7 +536,7 @@ static void brw_emit_vertices(struct brw_context *brw)
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struct brw_vertex_element *input = brw->vb.enabled[i];
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uint32_t dw0;
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if (IS_GEN6(intel->intelScreen->deviceID)) {
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if (intel->gen >= 6) {
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dw0 = GEN6_VB0_ACCESS_VERTEXDATA |
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(i << GEN6_VB0_INDEX_SHIFT);
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} else {
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@ -549,7 +549,7 @@ static void brw_emit_vertices(struct brw_context *brw)
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OUT_RELOC(input->bo,
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I915_GEM_DOMAIN_VERTEX, 0,
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input->offset);
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if (intel->is_ironlake) {
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if (intel->is_ironlake || intel->gen >= 6) {
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OUT_RELOC(input->bo,
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I915_GEM_DOMAIN_VERTEX, 0,
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input->bo->size - 1);
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@ -592,7 +592,7 @@ static void brw_emit_vertices(struct brw_context *brw)
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(0 << BRW_VE0_SRC_OFFSET_SHIFT));
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}
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if (intel->is_ironlake)
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if (intel->is_ironlake || intel->gen >= 6)
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OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
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(comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
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(comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
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@ -612,6 +612,8 @@ intelInitContext(struct intel_context *intel,
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if (IS_GEN6(intel->intelScreen->deviceID)) {
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intel->gen = 6;
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intel->needs_ff_sync = GL_TRUE;
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intel->has_luminance_srgb = GL_TRUE;
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} else if (IS_965(intel->intelScreen->deviceID)) {
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intel->gen = 4;
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} else if (IS_9XX(intel->intelScreen->deviceID)) {
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