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freedreno/ir3: enable indirect tex/samp (sam.s2en)
For now it uses indirect for everything. The next step is for the ir3_cp pass to detect the case that tex and samp idx are immediate and convert the sam instruction back to the non .s2en variant. But doing that in a following patch so we can shake out the bugs with .s2en more easily. Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark
parent
1088b788d8
commit
1443694ee5
2 changed files with 73 additions and 22 deletions
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@ -1332,18 +1332,16 @@ INSTR1(DSY)
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static inline struct ir3_instruction *
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ir3_SAM(struct ir3_block *block, opc_t opc, type_t type,
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unsigned wrmask, unsigned flags, unsigned samp, unsigned tex,
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unsigned wrmask, unsigned flags, struct ir3_instruction *samp_tex,
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struct ir3_instruction *src0, struct ir3_instruction *src1)
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{
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struct ir3_instruction *sam;
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struct ir3_register *reg;
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sam = ir3_instr_create(block, opc);
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sam->flags |= flags;
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sam->flags |= flags | IR3_INSTR_S2EN;
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ir3_reg_create(sam, 0, 0)->wrmask = wrmask;
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// temporary step, extra dummy src which will become the
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// hvec2(samp, tex) argument:
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ir3_reg_create(sam, 0, 0);
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__ssa_src(sam, samp_tex, IR3_REG_HALF);
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if (src0) {
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reg = ir3_reg_create(sam, 0, IR3_REG_SSA);
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reg->wrmask = (1 << (src0->regs_count - 1)) - 1;
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@ -1354,8 +1352,6 @@ ir3_SAM(struct ir3_block *block, opc_t opc, type_t type,
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reg->instr = src1;
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reg->wrmask = (1 << (src1->regs_count - 1)) - 1;
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}
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sam->cat5.samp = samp;
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sam->cat5.tex = tex;
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sam->cat5.type = type;
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return sam;
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@ -885,6 +885,25 @@ emit_intrinsic_atomic_shared(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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return atomic;
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}
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/* TODO handle actual indirect/dynamic case.. which is going to be weird
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* to handle with the image_mapping table..
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*/
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static struct ir3_instruction *
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get_image_samp_tex_src(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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{
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unsigned slot = ir3_get_image_slot(nir_src_as_deref(intr->src[0]));
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unsigned tex_idx = ir3_image_to_tex(&ctx->so->image_mapping, slot);
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struct ir3_instruction *texture, *sampler;
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texture = create_immed_typed(ctx->block, tex_idx, TYPE_U16);
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sampler = create_immed_typed(ctx->block, tex_idx, TYPE_U16);
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return ir3_create_collect(ctx, (struct ir3_instruction*[]){
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sampler,
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texture,
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}, 2);
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}
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/* src[] = { deref, coord, sample_index }. const_index[] = {} */
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static void
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emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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@ -892,12 +911,11 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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{
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struct ir3_block *b = ctx->block;
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const nir_variable *var = nir_intrinsic_get_var(intr, 0);
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struct ir3_instruction *samp_tex = get_image_samp_tex_src(ctx, intr);
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struct ir3_instruction *sam;
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struct ir3_instruction * const *src0 = ir3_get_src(ctx, &intr->src[1]);
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struct ir3_instruction *coords[4];
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unsigned flags, ncoords = ir3_get_image_coords(var, &flags);
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unsigned slot = ir3_get_image_slot(nir_src_as_deref(intr->src[0]));
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unsigned tex_idx = ir3_image_to_tex(&ctx->so->image_mapping, slot);
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type_t type = ir3_get_image_type(var);
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/* hmm, this seems a bit odd, but it is what blob does and (at least
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@ -915,7 +933,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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coords[ncoords++] = create_immed(b, 0);
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sam = ir3_SAM(b, OPC_ISAM, type, 0b1111, flags,
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tex_idx, tex_idx, ir3_create_collect(ctx, coords, ncoords), NULL);
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samp_tex, ir3_create_collect(ctx, coords, ncoords), NULL);
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sam->barrier_class = IR3_BARRIER_IMAGE_R;
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sam->barrier_conflict = IR3_BARRIER_IMAGE_W;
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@ -929,14 +947,13 @@ emit_intrinsic_image_size(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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{
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struct ir3_block *b = ctx->block;
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const nir_variable *var = nir_intrinsic_get_var(intr, 0);
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unsigned slot = ir3_get_image_slot(nir_src_as_deref(intr->src[0]));
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unsigned tex_idx = ir3_image_to_tex(&ctx->so->image_mapping, slot);
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struct ir3_instruction *samp_tex = get_image_samp_tex_src(ctx, intr);
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struct ir3_instruction *sam, *lod;
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unsigned flags, ncoords = ir3_get_image_coords(var, &flags);
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lod = create_immed(b, 0);
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sam = ir3_SAM(b, OPC_GETSIZE, TYPE_U32, 0b1111, flags,
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tex_idx, tex_idx, lod, NULL);
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samp_tex, lod, NULL);
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/* Array size actually ends up in .w rather than .z. This doesn't
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* matter for miplevel 0, but for higher mips the value in z is
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@ -1439,6 +1456,43 @@ tex_info(nir_tex_instr *tex, unsigned *flagsp, unsigned *coordsp)
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*coordsp = coords;
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}
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/* Gets the sampler/texture idx as a hvec2. Which could either be dynamic
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* or immediate (in which case it will get lowered later to a non .s2en
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* version of the tex instruction which encode tex/samp as immediates:
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*/
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static struct ir3_instruction *
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get_tex_samp_tex_src(struct ir3_context *ctx, nir_tex_instr *tex)
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{
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int texture_idx = nir_tex_instr_src_index(tex, nir_tex_src_texture_offset);
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int sampler_idx = nir_tex_instr_src_index(tex, nir_tex_src_sampler_offset);
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struct ir3_instruction *texture, *sampler;
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if (texture_idx >= 0) {
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texture = ir3_get_src(ctx, &tex->src[texture_idx].src)[0];
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texture = ir3_COV(ctx->block, texture, TYPE_U32, TYPE_U16);
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} else {
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/* TODO what to do for dynamic case? I guess we only need the
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* max index for astc srgb workaround so maybe not a problem
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* to worry about if we don't enable indirect samplers for
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* a4xx?
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*/
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ctx->max_texture_index = MAX2(ctx->max_texture_index, tex->texture_index);
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texture = create_immed_typed(ctx->block, tex->texture_index, TYPE_U16);
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}
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if (sampler_idx >= 0) {
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sampler = ir3_get_src(ctx, &tex->src[sampler_idx].src)[0];
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sampler = ir3_COV(ctx->block, sampler, TYPE_U32, TYPE_U16);
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} else {
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sampler = create_immed_typed(ctx->block, tex->sampler_index, TYPE_U16);
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}
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return ir3_create_collect(ctx, (struct ir3_instruction*[]){
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sampler,
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texture,
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}, 2);
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}
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static void
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emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
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{
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@ -1492,6 +1546,10 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
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case nir_tex_src_ms_index:
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sample_index = ir3_get_src(ctx, &tex->src[i].src)[0];
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break;
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case nir_tex_src_texture_offset:
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case nir_tex_src_sampler_offset:
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/* handled in get_tex_samp_src() */
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break;
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default:
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ir3_context_error(ctx, "Unhandled NIR tex src type: %d\n",
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tex->src[i].src_type);
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@ -1659,17 +1717,14 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
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if (opc == OPC_GETLOD)
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type = TYPE_U32;
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unsigned tex_idx = tex->texture_index;
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ctx->max_texture_index = MAX2(ctx->max_texture_index, tex_idx);
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struct ir3_instruction *samp_tex = get_tex_samp_tex_src(ctx, tex);
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struct ir3_instruction *col0 = ir3_create_collect(ctx, src0, nsrc0);
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struct ir3_instruction *col1 = ir3_create_collect(ctx, src1, nsrc1);
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sam = ir3_SAM(b, opc, type, MASK(ncomp), flags,
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tex_idx, tex_idx, col0, col1);
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samp_tex, col0, col1);
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if ((ctx->astc_srgb & (1 << tex_idx)) && !nir_tex_instr_is_query(tex)) {
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if ((ctx->astc_srgb & (1 << tex->texture_index)) && !nir_tex_instr_is_query(tex)) {
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/* only need first 3 components: */
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sam->regs[0]->wrmask = 0x7;
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ir3_split_dest(b, dst, sam, 0, 3);
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@ -1678,7 +1733,7 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
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* texture state:
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*/
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sam = ir3_SAM(b, opc, type, 0b1000, flags,
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tex_idx, tex_idx, col0, col1);
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samp_tex, col0, col1);
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array_insert(ctx->ir, ctx->ir->astc_srgb, sam);
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@ -1712,7 +1767,7 @@ emit_tex_query_levels(struct ir3_context *ctx, nir_tex_instr *tex)
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dst = ir3_get_dst(ctx, &tex->dest, 1);
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sam = ir3_SAM(b, OPC_GETINFO, TYPE_U32, 0b0100, 0,
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tex->texture_index, tex->texture_index, NULL, NULL);
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get_tex_samp_tex_src(ctx, tex), NULL, NULL);
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/* even though there is only one component, since it ends
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* up in .z rather than .x, we need a split_dest()
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@ -1752,7 +1807,7 @@ emit_tex_txs(struct ir3_context *ctx, nir_tex_instr *tex)
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lod = ir3_get_src(ctx, &tex->src[0].src)[0];
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sam = ir3_SAM(b, OPC_GETSIZE, TYPE_U32, 0b1111, flags,
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tex->texture_index, tex->texture_index, lod, NULL);
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get_tex_samp_tex_src(ctx, tex), lod, NULL);
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ir3_split_dest(b, dst, sam, 0, 4);
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