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intel/blorp: Update clear color state buffer during fast clears.

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We always want to update the fast clear color during a fast clear on
i965. On anv, we are doing that before a resolve, but by adding support
to blorp, we can do a similar thing and update it during a fast clear
instead.

The goal is to remove some code from anv that does such update, and
centralize everything in blorp, hopefully removing a lot of code
duplication. It also allows us to have a similar behavior on gen < 9 and
gen >= 10.

v5: s/we/we are/ (Jordan)

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Rafael Antognolli 2018-03-05 08:52:35 -08:00
parent 92eb5bbc68
commit 14260e7c60
1 changed files with 48 additions and 0 deletions
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48
src/intel/blorp/blorp_genX_exec.h
View file

@ -1643,6 +1643,51 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch,
}
#endif
static void
blorp_update_clear_color(struct blorp_batch *batch,
const struct brw_blorp_surface_info *info,
enum isl_aux_op op)
{
if (info->clear_color_addr.buffer && op == ISL_AUX_OP_FAST_CLEAR) {
#if GEN_GEN >= 9
for (int i = 0; i < 4; i++) {
blorp_emit(batch, GENX(MI_STORE_DATA_IMM), sdi) {
sdi.Address = info->clear_color_addr;
sdi.Address.offset += i * 4;
sdi.ImmediateData = info->clear_color.u32[i];
}
}
#elif GEN_GEN >= 7
blorp_emit(batch, GENX(MI_STORE_DATA_IMM), sdi) {
sdi.Address = info->clear_color_addr;
sdi.ImmediateData = ISL_CHANNEL_SELECT_RED << 25 |
ISL_CHANNEL_SELECT_GREEN << 22 |
ISL_CHANNEL_SELECT_BLUE << 19 |
ISL_CHANNEL_SELECT_ALPHA << 16;
if (isl_format_has_int_channel(info->view.format)) {
for (unsigned i = 0; i < 4; i++) {
assert(info->clear_color.u32[i] == 0 ||
info->clear_color.u32[i] == 1);
}
sdi.ImmediateData |= (info->clear_color.u32[0] != 0) << 31;
sdi.ImmediateData |= (info->clear_color.u32[1] != 0) << 30;
sdi.ImmediateData |= (info->clear_color.u32[2] != 0) << 29;
sdi.ImmediateData |= (info->clear_color.u32[3] != 0) << 28;
} else {
for (unsigned i = 0; i < 4; i++) {
assert(info->clear_color.f32[i] == 0.0f ||
info->clear_color.f32[i] == 1.0f);
}
sdi.ImmediateData |= (info->clear_color.f32[0] != 0.0f) << 31;
sdi.ImmediateData |= (info->clear_color.f32[1] != 0.0f) << 30;
sdi.ImmediateData |= (info->clear_color.f32[2] != 0.0f) << 29;
sdi.ImmediateData |= (info->clear_color.f32[3] != 0.0f) << 28;
}
}
#endif
}
}
/**
* \brief Execute a blit or render pass operation.
*
@ -1655,6 +1700,9 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch,
static void
blorp_exec(struct blorp_batch *batch, const struct blorp_params *params)
{
blorp_update_clear_color(batch, &params->dst, params->fast_clear_op);
blorp_update_clear_color(batch, &params->depth, params->hiz_op);
#if GEN_GEN >= 8
if (params->hiz_op != ISL_AUX_OP_NONE) {
blorp_emit_gen8_hiz_op(batch, params);