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i965/gen8: Initialize aux_mode to GEN8_SURFACE_AUX_MODE_NONE

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GEN8_SURFACE_AUX_MODE_NONE is 0, so this is a no-op.

Yet, this also makes it clear that we can compare aux_mode to the
other GEN8_SURFACE_AUX_MODE_ values. We will want to compare to
GEN8_SURFACE_AUX_MODE_HIZ.

v2: Some very minor cherry-pick conflicts due to moving it around in the series.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
This commit is contained in:
Jordan Justen 2014-07-08 18:17:57 +00:00 • committed by Ben Widawsky
parent 18f688d62a
commit 141ef75569
1 changed files with 2 additions and 2 deletions
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4
src/mesa/drivers/dri/i965/gen8_surface_state.c
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@ -210,7 +210,7 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
{
const unsigned depth = max_layer - min_layer;
struct intel_mipmap_tree *aux_mt = NULL;
uint32_t aux_mode = 0;
uint32_t aux_mode = GEN8_SURFACE_AUX_MODE_NONE;
uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
int surf_index = surf_offset - &brw->wm.base.surf_offset[0];
unsigned tiling_mode, pitch;
@ -425,7 +425,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_mipmap_tree *mt = irb->mt;
struct intel_mipmap_tree *aux_mt = NULL;
uint32_t aux_mode = 0;
uint32_t aux_mode = GEN8_SURFACE_AUX_MODE_NONE;
unsigned width = mt->logical_width0;
unsigned height = mt->logical_height0;
unsigned pitch = mt->pitch;