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https://gitlab.freedesktop.org/mesa/mesa.git
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i965: Dump the surface, sampler, and sdc state using state_batch_list[].
Now, for example, INTEL_DEBUG=batch tex-border-1 shows all the texturing state involved. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt
parent
709a7af2af
commit
13e82ece6d
1 changed files with 104 additions and 163 deletions
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@ -117,193 +117,123 @@ get_965_surface_format(unsigned int surface_format)
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}
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}
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static void dump_wm_surface_state(struct brw_context *brw)
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static void dump_surface_state(struct brw_context *brw, uint32_t offset)
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{
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dri_bo *bo;
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GLubyte *base;
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int i;
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const char *name = "SURF";
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uint32_t *surf = brw->intel.batch.bo->virtual + offset;
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bo = brw->intel.batch.bo;
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drm_intel_bo_map(bo, GL_FALSE);
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base = bo->virtual;
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for (i = 0; i < brw->wm.nr_surfaces; i++) {
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unsigned int surfoff;
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uint32_t *surf;
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char name[20];
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if (brw->wm.surf_offset[i] == 0) {
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fprintf(stderr, "WM SURF%d: NULL\n", i);
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continue;
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}
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surfoff = bo->offset + brw->wm.surf_offset[i];
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surf = (uint32_t *)(base + brw->wm.surf_offset[i]);
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sprintf(name, "WM SURF%d", i);
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state_out(name, surf, surfoff, 0, "%s %s\n",
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get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)),
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get_965_surface_format(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)));
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state_out(name, surf, surfoff, 1, "offset\n");
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state_out(name, surf, surfoff, 2, "%dx%d size, %d mips\n",
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GET_FIELD(surf[2], BRW_SURFACE_WIDTH) + 1,
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GET_FIELD(surf[2], BRW_SURFACE_HEIGHT) + 1);
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state_out(name, surf, surfoff, 3, "pitch %d, %s tiled\n",
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GET_FIELD(surf[3], BRW_SURFACE_PITCH) + 1,
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(surf[3] & BRW_SURFACE_TILED) ?
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((surf[3] & BRW_SURFACE_TILED_Y) ? "Y" : "X") : "not");
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state_out(name, surf, surfoff, 4, "mip base %d\n",
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GET_FIELD(surf[4], BRW_SURFACE_MIN_LOD));
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state_out(name, surf, surfoff, 5, "x,y offset: %d,%d\n",
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GET_FIELD(surf[5], BRW_SURFACE_X_OFFSET),
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GET_FIELD(surf[5], BRW_SURFACE_Y_OFFSET));
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}
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drm_intel_bo_unmap(bo);
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batch_out(brw, name, offset, 0, "%s %s\n",
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get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)),
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get_965_surface_format(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)));
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batch_out(brw, name, offset, 1, "offset\n");
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batch_out(brw, name, offset, 2, "%dx%d size, %d mips\n",
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GET_FIELD(surf[2], BRW_SURFACE_WIDTH) + 1,
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GET_FIELD(surf[2], BRW_SURFACE_HEIGHT) + 1,
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GET_FIELD(surf[2], BRW_SURFACE_LOD));
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batch_out(brw, name, offset, 3, "pitch %d, %s tiled\n",
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GET_FIELD(surf[3], BRW_SURFACE_PITCH) + 1,
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(surf[3] & BRW_SURFACE_TILED) ?
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((surf[3] & BRW_SURFACE_TILED_Y) ? "Y" : "X") : "not");
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batch_out(brw, name, offset, 4, "mip base %d\n",
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GET_FIELD(surf[4], BRW_SURFACE_MIN_LOD));
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batch_out(brw, name, offset, 5, "x,y offset: %d,%d\n",
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GET_FIELD(surf[5], BRW_SURFACE_X_OFFSET),
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GET_FIELD(surf[5], BRW_SURFACE_Y_OFFSET));
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}
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static void dump_gen7_surface_state(struct brw_context *brw)
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static void dump_gen7_surface_state(struct brw_context *brw, uint32_t offset)
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{
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dri_bo *bo;
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GLubyte *base;
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int i;
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const char *name = "SURF";
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struct gen7_surface_state *surf = brw->intel.batch.bo->virtual + offset;
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bo = brw->intel.batch.bo;
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drm_intel_bo_map(bo, GL_FALSE);
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base = bo->virtual;
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for (i = 0; i < brw->wm.nr_surfaces; i++) {
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unsigned int surfoff;
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struct gen7_surface_state *surf;
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char name[20];
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if (brw->wm.surf_offset[i] == 0) {
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fprintf(stderr, "WM SURF%d: NULL\n", i);
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continue;
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}
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surfoff = bo->offset + brw->wm.surf_offset[i];
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surf = (struct gen7_surface_state *) (base + brw->wm.surf_offset[i]);
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sprintf(name, "WM SURF%d", i);
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state_out(name, surf, surfoff, 0, "%s %s\n",
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get_965_surfacetype(surf->ss0.surface_type),
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get_965_surface_format(surf->ss0.surface_format));
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state_out(name, surf, surfoff, 1, "offset\n");
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state_out(name, surf, surfoff, 2, "%dx%d size, %d mips\n",
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surf->ss2.width + 1, surf->ss2.height + 1, surf->ss5.mip_count);
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state_out(name, surf, surfoff, 3, "pitch %d, %stiled\n",
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surf->ss3.pitch + 1, surf->ss0.tiled_surface ? "" : "not ");
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state_out(name, surf, surfoff, 4, "mip base %d\n",
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surf->ss5.min_lod);
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state_out(name, surf, surfoff, 5, "x,y offset: %d,%d\n",
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surf->ss5.x_offset, surf->ss5.y_offset);
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}
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drm_intel_bo_unmap(bo);
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batch_out(brw, name, offset, 0, "%s %s\n",
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get_965_surfacetype(surf->ss0.surface_type),
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get_965_surface_format(surf->ss0.surface_format));
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batch_out(brw, name, offset, 1, "offset\n");
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batch_out(brw, name, offset, 2, "%dx%d size, %d mips\n",
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surf->ss2.width + 1, surf->ss2.height + 1, surf->ss5.mip_count);
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batch_out(brw, name, offset, 3, "pitch %d, %stiled\n",
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surf->ss3.pitch + 1, surf->ss0.tiled_surface ? "" : "not ");
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batch_out(brw, name, offset, 4, "mip base %d\n",
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surf->ss5.min_lod);
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batch_out(brw, name, offset, 5, "x,y offset: %d,%d\n",
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surf->ss5.x_offset, surf->ss5.y_offset);
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}
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static void dump_wm_sampler_state(struct brw_context *brw)
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static void
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dump_sdc(struct brw_context *brw, uint32_t offset)
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{
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const char *name = "SDC";
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struct intel_context *intel = &brw->intel;
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if (intel->gen >= 5 && intel->gen <= 6) {
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struct gen5_sampler_default_color *sdc = (intel->batch.bo->virtual +
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offset);
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batch_out(brw, name, offset, 0, "unorm rgba\n");
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batch_out(brw, name, offset, 1, "r %f\n", sdc->f[0]);
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batch_out(brw, name, offset, 2, "b %f\n", sdc->f[1]);
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batch_out(brw, name, offset, 3, "g %f\n", sdc->f[2]);
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batch_out(brw, name, offset, 4, "a %f\n", sdc->f[3]);
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batch_out(brw, name, offset, 5, "half float rg\n");
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batch_out(brw, name, offset, 6, "half float ba\n");
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batch_out(brw, name, offset, 7, "u16 rg\n");
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batch_out(brw, name, offset, 8, "u16 ba\n");
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batch_out(brw, name, offset, 9, "s16 rg\n");
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batch_out(brw, name, offset, 10, "s16 ba\n");
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batch_out(brw, name, offset, 11, "s8 rgba\n");
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} else {
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struct brw_sampler_default_color *sdc = (intel->batch.bo->virtual +
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offset);
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batch_out(brw, name, offset, 0, "r %f\n", sdc->color[0]);
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batch_out(brw, name, offset, 1, "g %f\n", sdc->color[1]);
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batch_out(brw, name, offset, 2, "b %f\n", sdc->color[2]);
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batch_out(brw, name, offset, 3, "a %f\n", sdc->color[3]);
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}
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}
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static void dump_sampler_state(struct brw_context *brw,
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uint32_t offset, uint32_t size)
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{
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struct intel_context *intel = &brw->intel;
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struct gl_context *ctx = &brw->intel.ctx;
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int i;
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struct brw_sampler_state *samp = intel->batch.bo->virtual + offset;
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assert(intel->gen < 7);
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drm_intel_bo_map(intel->batch.bo, GL_FALSE);
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for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
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unsigned int offset;
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uint32_t sdc_offset;
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struct brw_sampler_state *samp;
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for (i = 0; i < size / sizeof(*samp); i++) {
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char name[20];
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if (!ctx->Texture.Unit[i]._ReallyEnabled) {
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fprintf(stderr, "WM SAMP%d: disabled\n", i);
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continue;
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}
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offset = (intel->batch.bo->offset +
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brw->wm.sampler_offset +
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i * sizeof(struct brw_sampler_state));
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samp = (struct brw_sampler_state *)(intel->batch.bo->virtual +
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brw->wm.sampler_offset +
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i * sizeof(struct brw_sampler_state));
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sprintf(name, "WM SAMP%d", i);
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state_out(name, samp, offset, 0, "filtering\n");
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state_out(name, samp, offset, 1, "wrapping, lod\n");
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state_out(name, samp, offset, 2, "default color pointer\n");
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state_out(name, samp, offset, 3, "chroma key, aniso\n");
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batch_out(brw, name, offset, 0, "filtering\n");
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batch_out(brw, name, offset, 1, "wrapping, lod\n");
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batch_out(brw, name, offset, 2, "default color pointer\n");
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batch_out(brw, name, offset, 3, "chroma key, aniso\n");
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sprintf(name, " WM SDC%d", i);
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sdc_offset = intel->batch.bo->offset + brw->wm.sdc_offset[i];
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if (intel->gen >= 5) {
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struct gen5_sampler_default_color *sdc = (intel->batch.bo->virtual +
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brw->wm.sdc_offset[i]);
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state_out(name, sdc, sdc_offset, 0, "unorm rgba\n");
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state_out(name, sdc, sdc_offset, 1, "r %f\n", sdc->f[0]);
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state_out(name, sdc, sdc_offset, 2, "b %f\n", sdc->f[1]);
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state_out(name, sdc, sdc_offset, 3, "g %f\n", sdc->f[2]);
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state_out(name, sdc, sdc_offset, 4, "a %f\n", sdc->f[3]);
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state_out(name, sdc, sdc_offset, 5, "half float rg\n");
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state_out(name, sdc, sdc_offset, 6, "half float ba\n");
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state_out(name, sdc, sdc_offset, 7, "u16 rg\n");
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state_out(name, sdc, sdc_offset, 8, "u16 ba\n");
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state_out(name, sdc, sdc_offset, 9, "s16 rg\n");
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state_out(name, sdc, sdc_offset, 10, "s16 ba\n");
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state_out(name, sdc, sdc_offset, 11, "s8 rgba\n");
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} else {
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struct brw_sampler_default_color *sdc = (intel->batch.bo->virtual +
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brw->wm.sdc_offset[i]);
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state_out(name, sdc, sdc_offset, 0, "r %f\n", sdc->color[0]);
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state_out(name, sdc, sdc_offset, 1, "g %f\n", sdc->color[1]);
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state_out(name, sdc, sdc_offset, 2, "b %f\n", sdc->color[2]);
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state_out(name, sdc, sdc_offset, 3, "a %f\n", sdc->color[3]);
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}
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samp++;
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offset += sizeof(*samp);
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}
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drm_intel_bo_unmap(intel->batch.bo);
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}
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static void dump_gen7_sampler_state(struct brw_context *brw)
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static void dump_gen7_sampler_state(struct brw_context *brw,
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uint32_t offset, uint32_t size)
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{
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struct intel_context *intel = &brw->intel;
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struct gl_context *ctx = &brw->intel.ctx;
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struct gen7_sampler_state *samp = intel->batch.bo->virtual + offset;
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int i;
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assert(intel->gen >= 7);
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drm_intel_bo_map(intel->batch.bo, GL_FALSE);
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for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
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unsigned int offset;
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uint32_t sdc_offset;
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struct gen7_sampler_state *samp;
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for (i = 0; i < size / sizeof(*samp); i++) {
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char name[20];
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if (!ctx->Texture.Unit[i]._ReallyEnabled) {
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fprintf(stderr, "WM SAMP%d: disabled\n", i);
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continue;
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}
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offset = (intel->batch.bo->offset +
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brw->wm.sampler_offset +
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i * sizeof(struct gen7_sampler_state));
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samp = (struct gen7_sampler_state *)
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(intel->batch.bo->virtual + brw->wm.sampler_offset +
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i * sizeof(struct gen7_sampler_state));
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sprintf(name, "WM SAMP%d", i);
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state_out(name, samp, offset, 0, "filtering\n");
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state_out(name, samp, offset, 1, "wrapping, lod\n");
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state_out(name, samp, offset, 2, "default color pointer\n");
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state_out(name, samp, offset, 3, "chroma key, aniso\n");
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batch_out(brw, name, offset, 0, "filtering\n");
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batch_out(brw, name, offset, 1, "wrapping, lod\n");
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batch_out(brw, name, offset, 2, "default color pointer\n");
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batch_out(brw, name, offset, 3, "chroma key, aniso\n");
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sprintf(name, " WM SDC%d", i);
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sdc_offset = intel->batch.bo->offset + brw->wm.sdc_offset[i];
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struct brw_sampler_default_color *sdc =
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intel->batch.bo->virtual + brw->wm.sdc_offset[i];
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state_out(name, sdc, sdc_offset, 0, "r %f\n", sdc->color[0]);
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state_out(name, sdc, sdc_offset, 1, "g %f\n", sdc->color[1]);
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state_out(name, sdc, sdc_offset, 2, "b %f\n", sdc->color[2]);
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state_out(name, sdc, sdc_offset, 3, "a %f\n", sdc->color[3]);
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samp++;
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offset += sizeof(*samp);
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}
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drm_intel_bo_unmap(intel->batch.bo);
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}
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@ -459,6 +389,7 @@ dump_state_batch(struct brw_context *brw)
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for (i = 0; i < brw->state_batch_count; i++) {
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uint32_t offset = brw->state_batch_list[i].offset;
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uint32_t size = brw->state_batch_list[i].size;
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switch (brw->state_batch_list[i].type) {
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case AUB_TRACE_CLIP_VP_STATE:
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@ -483,6 +414,23 @@ dump_state_batch(struct brw_context *brw)
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case AUB_TRACE_BLEND_STATE:
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dump_blend_state(brw, offset);
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break;
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case AUB_TRACE_SURFACE_STATE:
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if (intel->gen < 7) {
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dump_surface_state(brw, offset);
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} else {
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dump_gen7_surface_state(brw, offset);
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}
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break;
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case AUB_TRACE_SAMPLER_STATE:
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if (intel->gen < 7) {
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dump_sampler_state(brw, offset, size);
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} else {
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dump_gen7_sampler_state(brw, offset, size);
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}
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break;
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case AUB_TRACE_SAMPLER_DEFAULT_COLOR:
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dump_sdc(brw, offset);
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break;
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default:
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break;
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}
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@ -507,13 +455,6 @@ void brw_debug_batch(struct intel_context *intel)
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brw->intel.batch.bo,
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brw->wm.bind_bo_offset,
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4 * brw->wm.nr_surfaces);
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if (intel->gen < 7) {
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dump_wm_surface_state(brw);
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dump_wm_sampler_state(brw);
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} else {
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dump_gen7_surface_state(brw);
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dump_gen7_sampler_state(brw);
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}
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if (intel->gen < 6)
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state_struct_out("VS", intel->batch.bo, brw->vs.state_offset,
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