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radeonsi: change bind_history to track usage in each shader stage

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13400>
This commit is contained in:
Marek Olšák 2021-10-16 12:07:56 -04:00 • committed by Marge Bot
parent 9f2a97e9df
commit 13b1424e96
4 changed files with 33 additions and 14 deletions
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20
src/gallium/drivers/radeonsi/si_descriptors.c
View file

@ -544,7 +544,7 @@ static void si_set_sampler_views(struct si_context *sctx, unsigned shader,
si_set_sampler_view_desc(sctx, sview, samplers->sampler_states[slot], desc);
if (tex->buffer.b.b.target == PIPE_BUFFER) {
tex->buffer.bind_history |= PIPE_BIND_SAMPLER_VIEW;
tex->buffer.bind_history |= SI_BIND_SAMPLER_BUFFER(shader);
samplers->needs_depth_decompress_mask &= ~(1u << slot);
samplers->needs_color_decompress_mask &= ~(1u << slot);
} else {
@ -819,7 +819,7 @@ static void si_set_shader_image(struct si_context *ctx, unsigned shader, unsigne
if (res->b.b.target == PIPE_BUFFER) {
images->needs_color_decompress_mask &= ~(1 << slot);
images->display_dcc_store_mask &= ~(1u << slot);
res->bind_history |= PIPE_BIND_SHADER_IMAGE;
res->bind_history |= SI_BIND_IMAGE_BUFFER(shader);
} else {
struct si_texture *tex = (struct si_texture *)res;
unsigned level = view->u.tex.level;
@ -1270,7 +1270,7 @@ static void si_pipe_set_constant_buffer(struct pipe_context *ctx, enum pipe_shad
assert(!"constant buffer 0 must have a 32-bit VM address, use const_uploader");
return;
}
si_resource(input->buffer)->bind_history |= PIPE_BIND_CONSTANT_BUFFER;
si_resource(input->buffer)->bind_history |= SI_BIND_CONSTANT_BUFFER(shader);
}
if (slot == 0)
@ -1391,7 +1391,7 @@ static void si_set_shader_buffers(struct pipe_context *ctx, enum pipe_shader_typ
unsigned slot = si_get_shaderbuf_slot(start_slot + i);
if (sbuffer && sbuffer->buffer)
si_resource(sbuffer->buffer)->bind_history |= PIPE_BIND_SHADER_BUFFER;
si_resource(sbuffer->buffer)->bind_history |= SI_BIND_SHADER_BUFFER(shader);
si_set_shader_buffer(sctx, buffers, descriptors_idx, slot, sbuffer,
!!(writable_bitmask & (1u << i)), buffers->priority);
@ -1642,7 +1642,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
/* Vertex buffers. */
if (!buffer) {
sctx->vertex_buffers_dirty = num_elems > 0;
} else if (buffer->bind_history & PIPE_BIND_VERTEX_BUFFER) {
} else if (buffer->bind_history & SI_BIND_VERTEX_BUFFER) {
for (i = 0; i < num_elems; i++) {
int vb = sctx->vertex_elements->vertex_buffer_index[i];
@ -1659,7 +1659,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
}
/* Streamout buffers. (other internal buffers can't be invalidated) */
if (!buffer || buffer->bind_history & PIPE_BIND_STREAM_OUTPUT) {
if (!buffer || buffer->bind_history & SI_BIND_STREAMOUT_BUFFER) {
for (i = SI_VS_STREAMOUT_BUF0; i <= SI_VS_STREAMOUT_BUF3; i++) {
struct si_buffer_resources *buffers = &sctx->internal_bindings;
struct si_descriptors *descs = &sctx->descriptors[SI_DESCS_INTERNAL];
@ -1683,7 +1683,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
}
/* Constant and shader buffers. */
if (!buffer || buffer->bind_history & PIPE_BIND_CONSTANT_BUFFER) {
if (!buffer || buffer->bind_history & SI_BIND_CONSTANT_BUFFER_ALL) {
for (shader = 0; shader < SI_NUM_SHADERS; shader++)
si_reset_buffer_resources(sctx, &sctx->const_and_shader_buffers[shader],
si_const_and_shader_buffer_descriptors_idx(shader),
@ -1691,7 +1691,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
buf, sctx->const_and_shader_buffers[shader].priority_constbuf);
}
if (!buffer || buffer->bind_history & PIPE_BIND_SHADER_BUFFER) {
if (!buffer || buffer->bind_history & SI_BIND_SHADER_BUFFER_ALL) {
for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
if (si_reset_buffer_resources(sctx, &sctx->const_and_shader_buffers[shader],
si_const_and_shader_buffer_descriptors_idx(shader),
@ -1703,7 +1703,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
}
}
if (!buffer || buffer->bind_history & PIPE_BIND_SAMPLER_VIEW) {
if (!buffer || buffer->bind_history & SI_BIND_SAMPLER_BUFFER_ALL) {
/* Texture buffers - update bindings. */
for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
struct si_samplers *samplers = &sctx->samplers[shader];
@ -1729,7 +1729,7 @@ void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
}
/* Shader images */
if (!buffer || buffer->bind_history & PIPE_BIND_SHADER_IMAGE) {
if (!buffer || buffer->bind_history & SI_BIND_IMAGE_BUFFER_ALL) {
for (shader = 0; shader < SI_NUM_SHADERS; ++shader) {
struct si_images *images = &sctx->images[shader];
struct si_descriptors *descs = si_sampler_and_image_descriptors(sctx, shader);

21
src/gallium/drivers/radeonsi/si_pipe.h
View file

@ -281,6 +281,25 @@ enum si_coherency
SI_COHERENCY_CP,
};
#define SI_BIND_CONSTANT_BUFFER_SHIFT 0
#define SI_BIND_SHADER_BUFFER_SHIFT 6
#define SI_BIND_IMAGE_BUFFER_SHIFT 12
#define SI_BIND_SAMPLER_BUFFER_SHIFT 18
#define SI_BIND_OTHER_BUFFER_SHIFT 24
/* Bind masks for all 6 shader stages. */
#define SI_BIND_CONSTANT_BUFFER_ALL (0x3f << SI_BIND_CONSTANT_BUFFER_SHIFT)
#define SI_BIND_SHADER_BUFFER_ALL (0x3f << SI_BIND_SHADER_BUFFER_SHIFT)
#define SI_BIND_IMAGE_BUFFER_ALL (0x3f << SI_BIND_IMAGE_BUFFER_SHIFT)
#define SI_BIND_SAMPLER_BUFFER_ALL (0x3f << SI_BIND_SAMPLER_BUFFER_SHIFT)
#define SI_BIND_CONSTANT_BUFFER(shader) ((1 << (shader)) << SI_BIND_CONSTANT_BUFFER_SHIFT)
#define SI_BIND_SHADER_BUFFER(shader) ((1 << (shader)) << SI_BIND_SHADER_BUFFER_SHIFT)
#define SI_BIND_IMAGE_BUFFER(shader) ((1 << (shader)) << SI_BIND_IMAGE_BUFFER_SHIFT)
#define SI_BIND_SAMPLER_BUFFER(shader) ((1 << (shader)) << SI_BIND_SAMPLER_BUFFER_SHIFT)
#define SI_BIND_VERTEX_BUFFER (1 << (SI_BIND_OTHER_BUFFER_SHIFT + 0))
#define SI_BIND_STREAMOUT_BUFFER (1 << (SI_BIND_OTHER_BUFFER_SHIFT + 1))
struct si_compute;
struct si_shader_context;
struct hash_table;
@ -302,7 +321,7 @@ struct si_resource {
uint8_t bo_alignment_log2;
enum radeon_bo_domain domains:8;
enum radeon_bo_flag flags:16;
unsigned bind_history;
unsigned bind_history; /* bitmask of SI_BIND_xxx_BUFFER */
/* The buffer range which is initialized (with a write transfer,
* streamout, DMA, or as a random access target). The rest of

4
src/gallium/drivers/radeonsi/si_state.c
View file

@ -4977,7 +4977,7 @@ static void si_set_vertex_buffers(struct pipe_context *ctx, unsigned start_slot,
si_context_add_resource_size(sctx, buf);
if (buf)
si_resource(buf)->bind_history |= PIPE_BIND_VERTEX_BUFFER;
si_resource(buf)->bind_history |= SI_BIND_VERTEX_BUFFER;
}
/* take_ownership allows us to copy pipe_resource pointers without refcounting. */
memcpy(dst, buffers, count * sizeof(struct pipe_vertex_buffer));
@ -4997,7 +4997,7 @@ static void si_set_vertex_buffers(struct pipe_context *ctx, unsigned start_slot,
si_context_add_resource_size(sctx, buf);
if (buf)
si_resource(buf)->bind_history |= PIPE_BIND_VERTEX_BUFFER;
si_resource(buf)->bind_history |= SI_BIND_VERTEX_BUFFER;
}
}
} else {

2
src/gallium/drivers/radeonsi/si_state_streamout.c
View file

@ -199,7 +199,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx, unsigned num_targ
}
si_set_internal_shader_buffer(sctx, SI_VS_STREAMOUT_BUF0 + i, &sbuf);
si_resource(targets[i]->buffer)->bind_history |= PIPE_BIND_STREAM_OUTPUT;
si_resource(targets[i]->buffer)->bind_history |= SI_BIND_STREAMOUT_BUFFER;
} else {
si_set_internal_shader_buffer(sctx, SI_VS_STREAMOUT_BUF0 + i, NULL);
}