From 12f85083631ae994e2ce508869266b4ed4046771 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 21 Aug 2025 18:29:09 +0200 Subject: [PATCH] radv: add a new dirty bit for the VGT prim state Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_cmd_buffer.c | 18 ++++++++++-------- src/amd/vulkan/radv_cmd_buffer.h | 3 ++- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 3c1fff099ec..53e89270cdf 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3401,7 +3401,7 @@ radv_emit_depth_bias_state(struct radv_cmd_buffer *cmd_buffer) } static void -radv_emit_primitive_topology(struct radv_cmd_buffer *cmd_buffer) +radv_emit_vgt_prim_state(struct radv_cmd_buffer *cmd_buffer) { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); const struct radv_physical_device *pdev = radv_device_physical(device); @@ -3425,6 +3425,8 @@ radv_emit_primitive_topology(struct radv_cmd_buffer *cmd_buffer) radeon_end(); radv_emit_vgt_gs_out(cmd_buffer, vgt_gs_out_prim_type); + + cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VGT_PRIM_STATE; } static bool @@ -5393,13 +5395,6 @@ lookup_ps_epilog(struct radv_cmd_buffer *cmd_buffer) static void radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const uint64_t states) { - struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - const struct radv_physical_device *pdev = radv_device_physical(device); - - if ((states & RADV_DYNAMIC_PRIMITIVE_TOPOLOGY) || - (pdev->info.gfx_level >= GFX12 && states & RADV_DYNAMIC_PATCH_CONTROL_POINTS)) - radv_emit_primitive_topology(cmd_buffer); - /* RADV_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE is handled by radv_emit_db_shader_control. */ cmd_buffer->state.dirty_dynamic &= ~states; @@ -11482,6 +11477,10 @@ radv_validate_dynamic_states(struct radv_cmd_buffer *cmd_buffer, uint64_t dynami if (dynamic_states & RADV_DYNAMIC_TESS_DOMAIN_ORIGIN) cmd_buffer->state.dirty |= RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE; + + if ((dynamic_states & RADV_DYNAMIC_PRIMITIVE_TOPOLOGY) || + (pdev->info.gfx_level >= GFX12 && dynamic_states & RADV_DYNAMIC_PATCH_CONTROL_POINTS)) + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VGT_PRIM_STATE; } static void @@ -11589,6 +11588,9 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_SCISSOR_STATE) radv_emit_scissor_state(cmd_buffer); + if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_VGT_PRIM_STATE) + radv_emit_vgt_prim_state(cmd_buffer); + if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_PATCH_CONTROL_POINTS_STATE) radv_emit_patch_control_points_state(cmd_buffer); diff --git a/src/amd/vulkan/radv_cmd_buffer.h b/src/amd/vulkan/radv_cmd_buffer.h index 8b6a03cff58..b166333bcbc 100644 --- a/src/amd/vulkan/radv_cmd_buffer.h +++ b/src/amd/vulkan/radv_cmd_buffer.h @@ -117,7 +117,8 @@ enum radv_cmd_dirty_bits { RADV_CMD_DIRTY_SCISSOR_STATE = 1ull << 31, RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE = 1ull << 32, RADV_CMD_DIRTY_PATCH_CONTROL_POINTS_STATE = 1ull << 33, - RADV_CMD_DIRTY_ALL = (1ull << 34) - 1, + RADV_CMD_DIRTY_VGT_PRIM_STATE = 1ull << 34, + RADV_CMD_DIRTY_ALL = (1ull << 35) - 1, RADV_CMD_DIRTY_SHADER_QUERY = RADV_CMD_DIRTY_NGG_STATE | RADV_CMD_DIRTY_TASK_STATE, };