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radv: Check for shareable images in central place.
One place to put the logic makes things easier to change. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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3bf48741e1
commit
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1 changed files with 5 additions and 5 deletions
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@ -122,13 +122,12 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
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static bool
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static bool
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radv_use_dcc_for_image(struct radv_device *device,
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radv_use_dcc_for_image(struct radv_device *device,
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const struct radv_image *image,
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const struct radv_image_create_info *create_info,
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const struct radv_image_create_info *create_info,
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const VkImageCreateInfo *pCreateInfo)
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const VkImageCreateInfo *pCreateInfo)
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{
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{
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bool dcc_compatible_formats;
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bool dcc_compatible_formats;
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bool blendable;
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bool blendable;
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bool shareable = vk_find_struct_const(pCreateInfo->pNext,
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EXTERNAL_MEMORY_IMAGE_CREATE_INFO_KHR) != NULL;
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/* DCC (Delta Color Compression) is only available for GFX8+. */
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/* DCC (Delta Color Compression) is only available for GFX8+. */
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if (device->physical_device->rad_info.chip_class < VI)
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if (device->physical_device->rad_info.chip_class < VI)
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@ -139,7 +138,7 @@ radv_use_dcc_for_image(struct radv_device *device,
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/* FIXME: DCC is broken for shareable images starting with GFX9 */
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/* FIXME: DCC is broken for shareable images starting with GFX9 */
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if (device->physical_device->rad_info.chip_class >= GFX9 &&
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if (device->physical_device->rad_info.chip_class >= GFX9 &&
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shareable)
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image->shareable)
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return false;
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return false;
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/* TODO: Enable DCC for storage images. */
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/* TODO: Enable DCC for storage images. */
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@ -198,6 +197,7 @@ radv_use_dcc_for_image(struct radv_device *device,
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static int
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static int
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radv_init_surface(struct radv_device *device,
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radv_init_surface(struct radv_device *device,
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const struct radv_image *image,
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struct radeon_surf *surface,
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struct radeon_surf *surface,
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const struct radv_image_create_info *create_info)
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const struct radv_image_create_info *create_info)
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{
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{
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@ -251,7 +251,7 @@ radv_init_surface(struct radv_device *device,
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surface->flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE;
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surface->flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE;
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if (!radv_use_dcc_for_image(device, create_info, pCreateInfo))
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if (!radv_use_dcc_for_image(device, image, create_info, pCreateInfo))
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surface->flags |= RADEON_SURF_DISABLE_DCC;
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surface->flags |= RADEON_SURF_DISABLE_DCC;
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if (create_info->scanout)
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if (create_info->scanout)
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@ -981,7 +981,7 @@ radv_image_create(VkDevice _device,
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image->info.surf_index = &device->image_mrt_offset_counter;
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image->info.surf_index = &device->image_mrt_offset_counter;
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}
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}
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radv_init_surface(device, &image->surface, create_info);
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radv_init_surface(device, image, &image->surface, create_info);
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device->ws->surface_init(device->ws, &image->info, &image->surface);
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device->ws->surface_init(device->ws, &image->info, &image->surface);
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