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nvc0/ir: Add support for double immediates

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Add support for encoding double immediates (up to 20 bits of precision)
into the generated nvc0 machine-code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Hans de Goede 2015-11-05 14:32:34 +01:00 • committed by Ilia Mirkin
parent 5169407221
commit 12c850d01c
1 changed files with 8 additions and 0 deletions
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8
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
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@ -323,6 +323,14 @@ CodeEmitterNVC0::setImmediate(const Instruction *i, const int s)
assert(imm);
u32 = imm->reg.data.u32;
if ((code[0] & 0xf) == 0x1) {
// double immediate
uint64_t u64 = imm->reg.data.u64;
assert(!(u64 & 0x00000fffffffffffULL));
assert(!(code[1] & 0xc000));
code[0] |= ((u64 >> 44) & 0x3f) << 26;
code[1] |= 0xc000 | (u64 >> 50);
} else
if ((code[0] & 0xf) == 0x2) {
// LIMM
code[0] |= (u32 & 0x3f) << 26;