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i965: Specialize SURFACE_STATE creation for shader time.

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This is basically a copy and paste of gen7_create_constant_surface, but
with the parameters filled in to offer a simpler interface.

It will diverge shortly.

I didn't bother adding it to the vtable for now since shader time is only
exposed on Gen7+.

v2: Replace tabs in the new code (by anholt)
    Add back dropped memset() and add a comment about HSW channel selects.

NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Kenneth Graunke 2013-02-06 23:26:35 -08:00 • committed by Eric Anholt
parent f27a220cad
commit 125b34cffb
4 changed files with 45 additions and 8 deletions
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2
src/mesa/drivers/dri/i965/brw_state.h
View file

@ -216,6 +216,8 @@ void gen7_set_surface_mcs_info(struct brw_context *brw,
bool is_render_target);
void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
void gen7_init_vtable_surface_functions(struct brw_context *brw);
void gen7_create_shader_time_surface(struct brw_context *brw,
uint32_t *out_offset);
/* brw_wm_sampler_state.c */
uint32_t translate_wrap_mode(GLenum wrap, bool using_nearest);

5
src/mesa/drivers/dri/i965/brw_vs_surface_state.c
View file

@ -137,14 +137,11 @@ const struct brw_tracked_state brw_vs_ubo_surfaces = {
static void
brw_vs_upload_binding_table(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
uint32_t *bind;
int i;
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
intel->vtbl.create_constant_surface(brw, brw->shader_time.bo, 0,
brw->shader_time.bo->size,
&brw->vs.surf_offset[SURF_INDEX_VS_SHADER_TIME]);
gen7_create_shader_time_surface(brw, &brw->vs.surf_offset[SURF_INDEX_VS_SHADER_TIME]);
assert(brw->vs.prog_data->num_surfaces <= SURF_INDEX_VS_SHADER_TIME);
brw->vs.prog_data->num_surfaces = SURF_INDEX_VS_SHADER_TIME;

5
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
View file

@ -1482,14 +1482,11 @@ const struct brw_tracked_state brw_wm_ubo_surfaces = {
static void
brw_upload_wm_binding_table(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
uint32_t *bind;
int i;
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
intel->vtbl.create_constant_surface(brw, brw->shader_time.bo, 0,
brw->shader_time.bo->size,
&brw->wm.surf_offset[SURF_INDEX_WM_SHADER_TIME]);
gen7_create_shader_time_surface(brw, &brw->wm.surf_offset[SURF_INDEX_WM_SHADER_TIME]);
}
/* Might want to calculate nr_surfaces first, to avoid taking up so much

41
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
View file

@ -424,6 +424,47 @@ gen7_create_constant_surface(struct brw_context *brw,
gen7_check_surface_setup(surf, false /* is_render_target */);
}
/**
* Create a surface for shader time.
*/
void
gen7_create_shader_time_surface(struct brw_context *brw, uint32_t *out_offset)
{
struct intel_context *intel = &brw->intel;
const int w = brw->shader_time.bo->size - 1;
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
8 * 4, 32, out_offset);
memset(surf, 0, 8 * 4);
surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT |
BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_SURFACE_FORMAT_SHIFT |
BRW_SURFACE_RC_READ_WRITE;
surf[1] = brw->shader_time.bo->offset; /* reloc */
surf[2] = SET_FIELD(w & 0x7f, GEN7_SURFACE_WIDTH) |
SET_FIELD((w >> 7) & 0x1fff, GEN7_SURFACE_HEIGHT);
surf[3] = SET_FIELD((w >> 20) & 0x7f, BRW_SURFACE_DEPTH) |
(16 - 1); /* stride between samples */
/* Unlike texture or renderbuffer surfaces, we only do untyped operations
* on the shader_time surface, so there's no need to set HSW channel
* overrides.
*/
/* Emit relocation to surface contents. Section 5.1.1 of the gen4
* bspec ("Data Cache") says that the data cache does not exist as
* a separate cache and is just the sampler cache.
*/
drm_intel_bo_emit_reloc(intel->batch.bo,
*out_offset + 4,
brw->shader_time.bo, 0,
I915_GEM_DOMAIN_SAMPLER, 0);
gen7_check_surface_setup(surf, false /* is_render_target */);
}
static void
gen7_update_null_renderbuffer_surface(struct brw_context *brw, unsigned unit)
{