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radv: drop the RADV_CALL macro.

Browse source 
This is leftover from anv, and we really never needed it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie 2016-10-11 15:54:52 +10:00
parent fc28f89157
commit 12301c5418
7 changed files with 42 additions and 50 deletions
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12
src/amd/vulkan/radv_meta_blit.c
View file

@ -297,7 +297,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
}); });
VkSampler sampler; VkSampler sampler;
RADV_CALL(CreateSampler)(radv_device_to_handle(device), radv_CreateSampler(radv_device_to_handle(device),
&(VkSamplerCreateInfo) { &(VkSamplerCreateInfo) {
.sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO,
.magFilter = blit_filter, .magFilter = blit_filter,
@ -349,7 +349,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
case VK_IMAGE_ASPECT_COLOR_BIT: { case VK_IMAGE_ASPECT_COLOR_BIT: {
unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format); unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format);
RADV_CALL(CmdBeginRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer), radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = device->meta_state.blit.render_pass[fs_key], .renderPass = device->meta_state.blit.render_pass[fs_key],
@ -377,7 +377,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
break; break;
} }
case VK_IMAGE_ASPECT_DEPTH_BIT: case VK_IMAGE_ASPECT_DEPTH_BIT:
RADV_CALL(CmdBeginRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer), radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = device->meta_state.blit.depth_only_rp, .renderPass = device->meta_state.blit.depth_only_rp,
@ -404,7 +404,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
} }
break; break;
case VK_IMAGE_ASPECT_STENCIL_BIT: case VK_IMAGE_ASPECT_STENCIL_BIT:
RADV_CALL(CmdBeginRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer), radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = device->meta_state.blit.stencil_only_rp, .renderPass = device->meta_state.blit.stencil_only_rp,
@ -444,9 +444,9 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer,
device->meta_state.blit.pipeline_layout, 0, 1, device->meta_state.blit.pipeline_layout, 0, 1,
&set, 0, NULL); &set, 0, NULL);
RADV_CALL(CmdDraw)(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
RADV_CALL(CmdEndRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer)); radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
/* At the point where we emit the draw call, all data from the /* At the point where we emit the draw call, all data from the
* descriptor sets, etc. has been used. We are free to delete it. * descriptor sets, etc. has been used. We are free to delete it.

10
src/amd/vulkan/radv_meta_blit2d.c
View file

@ -356,7 +356,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
if (dst->aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT) { if (dst->aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT) {
unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format); unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format);
RADV_CALL(CmdBeginRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer), radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = device->meta_state.blit2d.render_passes[fs_key], .renderPass = device->meta_state.blit2d.render_passes[fs_key],
@ -372,7 +372,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
bind_pipeline(cmd_buffer, src_type, fs_key); bind_pipeline(cmd_buffer, src_type, fs_key);
} else if (dst->aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) { } else if (dst->aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) {
RADV_CALL(CmdBeginRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer), radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = device->meta_state.blit2d.depth_only_rp, .renderPass = device->meta_state.blit2d.depth_only_rp,
@ -389,7 +389,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
bind_depth_pipeline(cmd_buffer, src_type); bind_depth_pipeline(cmd_buffer, src_type);
} else if (dst->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) { } else if (dst->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
RADV_CALL(CmdBeginRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer), radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = device->meta_state.blit2d.stencil_only_rp, .renderPass = device->meta_state.blit2d.stencil_only_rp,
@ -406,8 +406,8 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
bind_stencil_pipeline(cmd_buffer, src_type); bind_stencil_pipeline(cmd_buffer, src_type);
} }
RADV_CALL(CmdDraw)(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
RADV_CALL(CmdEndRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer)); radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
/* At the point where we emit the draw call, all data from the /* At the point where we emit the draw call, all data from the
* descriptor sets, etc. has been used. We are free to delete it. * descriptor sets, etc. has been used. We are free to delete it.

26
src/amd/vulkan/radv_meta_clear.c
View file

@ -320,7 +320,7 @@ destroy_pipeline(struct radv_device *device, struct radv_pipeline *pipeline)
if (!pipeline) if (!pipeline)
return; return;
RADV_CALL(DestroyPipeline)(radv_device_to_handle(device), radv_DestroyPipeline(radv_device_to_handle(device),
radv_pipeline_to_handle(pipeline), radv_pipeline_to_handle(pipeline),
&device->meta_state.alloc); &device->meta_state.alloc);
@ -329,7 +329,7 @@ destroy_pipeline(struct radv_device *device, struct radv_pipeline *pipeline)
static void static void
destroy_render_pass(struct radv_device *device, VkRenderPass renderpass) destroy_render_pass(struct radv_device *device, VkRenderPass renderpass)
{ {
RADV_CALL(DestroyRenderPass)(radv_device_to_handle(device), renderpass, radv_DestroyRenderPass(radv_device_to_handle(device), renderpass,
&device->meta_state.alloc); &device->meta_state.alloc);
} }
@ -435,16 +435,16 @@ emit_color_clear(struct radv_cmd_buffer *cmd_buffer,
}; };
RADV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1, radv_CmdBindVertexBuffers(cmd_buffer_h, 0, 1,
(VkBuffer[]) { radv_buffer_to_handle(&vertex_buffer) }, (VkBuffer[]) { radv_buffer_to_handle(&vertex_buffer) },
(VkDeviceSize[]) { 0 }); (VkDeviceSize[]) { 0 });
if (cmd_buffer->state.pipeline != pipeline) { if (cmd_buffer->state.pipeline != pipeline) {
RADV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
pipeline_h); pipeline_h);
} }
RADV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
radv_cmd_buffer_set_subpass(cmd_buffer, subpass, false); radv_cmd_buffer_set_subpass(cmd_buffer, subpass, false);
} }
@ -686,11 +686,11 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
}; };
if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
RADV_CALL(CmdSetStencilReference)(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT, radv_CmdSetStencilReference(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT,
clear_value.stencil); clear_value.stencil);
} }
RADV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1, radv_CmdBindVertexBuffers(cmd_buffer_h, 0, 1,
(VkBuffer[]) { radv_buffer_to_handle(&vertex_buffer) }, (VkBuffer[]) { radv_buffer_to_handle(&vertex_buffer) },
(VkDeviceSize[]) { 0 }); (VkDeviceSize[]) { 0 });
@ -702,14 +702,14 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer,
clear_rect, clear_rect,
clear_value); clear_value);
if (cmd_buffer->state.pipeline != pipeline) { if (cmd_buffer->state.pipeline != pipeline) {
RADV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
radv_pipeline_to_handle(pipeline)); radv_pipeline_to_handle(pipeline));
} }
if (depth_view_can_fast_clear(iview, subpass->depth_stencil_attachment.layout, clear_rect)) if (depth_view_can_fast_clear(iview, subpass->depth_stencil_attachment.layout, clear_rect))
radv_set_depth_clear_regs(cmd_buffer, iview->image, clear_value, aspects); radv_set_depth_clear_regs(cmd_buffer, iview->image, clear_value, aspects);
RADV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
} }
@ -1078,7 +1078,7 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer,
&cmd_buffer->pool->alloc, &cmd_buffer->pool->alloc,
&pass); &pass);
RADV_CALL(CmdBeginRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer), radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderArea = { .renderArea = {
@ -1112,10 +1112,10 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer,
emit_clear(cmd_buffer, &clear_att, &clear_rect); emit_clear(cmd_buffer, &clear_att, &clear_rect);
RADV_CALL(CmdEndRenderPass)(radv_cmd_buffer_to_handle(cmd_buffer)); radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
RADV_CALL(DestroyRenderPass)(device_h, pass, radv_DestroyRenderPass(device_h, pass,
&cmd_buffer->pool->alloc); &cmd_buffer->pool->alloc);
RADV_CALL(DestroyFramebuffer)(device_h, fb, radv_DestroyFramebuffer(device_h, fb,
&cmd_buffer->pool->alloc); &cmd_buffer->pool->alloc);
} }
} }

12
src/amd/vulkan/radv_meta_decompress.c
View file

@ -258,16 +258,16 @@ radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
const VkAllocationCallbacks *alloc = &device->meta_state.alloc; const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
if (pass_h) if (pass_h)
RADV_CALL(DestroyRenderPass)(device_h, pass_h, radv_DestroyRenderPass(device_h, pass_h,
&device->meta_state.alloc); &device->meta_state.alloc);
VkPipeline pipeline_h = state->depth_decomp.decompress_pipeline; VkPipeline pipeline_h = state->depth_decomp.decompress_pipeline;
if (pipeline_h) { if (pipeline_h) {
RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc); radv_DestroyPipeline(device_h, pipeline_h, alloc);
} }
pipeline_h = state->depth_decomp.resummarize_pipeline; pipeline_h = state->depth_decomp.resummarize_pipeline;
if (pipeline_h) { if (pipeline_h) {
RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc); radv_DestroyPipeline(device_h, pipeline_h, alloc);
} }
} }
@ -358,7 +358,7 @@ emit_depth_decomp(struct radv_cmd_buffer *cmd_buffer,
pipeline_h); pipeline_h);
} }
RADV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
} }
@ -416,7 +416,7 @@ static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
&cmd_buffer->pool->alloc, &cmd_buffer->pool->alloc,
&fb_h); &fb_h);
RADV_CALL(CmdBeginRenderPass)(cmd_buffer_h, radv_CmdBeginRenderPass(cmd_buffer_h,
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = cmd_buffer->device->meta_state.depth_decomp.pass, .renderPass = cmd_buffer->device->meta_state.depth_decomp.pass,
@ -437,7 +437,7 @@ static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
VK_SUBPASS_CONTENTS_INLINE); VK_SUBPASS_CONTENTS_INLINE);
emit_depth_decomp(cmd_buffer, &(VkOffset2D){0, 0 }, &(VkExtent2D){width, height}, pipeline_h); emit_depth_decomp(cmd_buffer, &(VkOffset2D){0, 0 }, &(VkExtent2D){width, height}, pipeline_h);
RADV_CALL(CmdEndRenderPass)(cmd_buffer_h); radv_CmdEndRenderPass(cmd_buffer_h);
radv_DestroyFramebuffer(device_h, fb_h, radv_DestroyFramebuffer(device_h, fb_h,
&cmd_buffer->pool->alloc); &cmd_buffer->pool->alloc);

14
src/amd/vulkan/radv_meta_fast_clear.c
View file

@ -312,7 +312,7 @@ create_pipeline(struct radv_device *device,
goto cleanup; goto cleanup;
cleanup_cmask: cleanup_cmask:
RADV_CALL(DestroyPipeline)(device_h, device->meta_state.fast_clear_flush.cmask_eliminate_pipeline, &device->meta_state.alloc); radv_DestroyPipeline(device_h, device->meta_state.fast_clear_flush.cmask_eliminate_pipeline, &device->meta_state.alloc);
cleanup: cleanup:
ralloc_free(fs_module.nir); ralloc_free(fs_module.nir);
return result; return result;
@ -327,17 +327,17 @@ radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device)
const VkAllocationCallbacks *alloc = &device->meta_state.alloc; const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
if (pass_h) if (pass_h)
RADV_CALL(DestroyRenderPass)(device_h, pass_h, radv_DestroyRenderPass(device_h, pass_h,
&device->meta_state.alloc); &device->meta_state.alloc);
VkPipeline pipeline_h = state->fast_clear_flush.cmask_eliminate_pipeline; VkPipeline pipeline_h = state->fast_clear_flush.cmask_eliminate_pipeline;
if (pipeline_h) { if (pipeline_h) {
RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc); radv_DestroyPipeline(device_h, pipeline_h, alloc);
} }
pipeline_h = state->fast_clear_flush.fmask_decompress_pipeline; pipeline_h = state->fast_clear_flush.fmask_decompress_pipeline;
if (pipeline_h) { if (pipeline_h) {
RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc); radv_DestroyPipeline(device_h, pipeline_h, alloc);
} }
} }
@ -446,7 +446,7 @@ emit_fast_clear_flush(struct radv_cmd_buffer *cmd_buffer,
pipeline_h); pipeline_h);
} }
RADV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_CB | cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_CB |
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META); RADV_CMD_FLAG_FLUSH_AND_INV_CB_META);
si_emit_cache_flush(cmd_buffer); si_emit_cache_flush(cmd_buffer);
@ -503,7 +503,7 @@ radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer,
&cmd_buffer->pool->alloc, &cmd_buffer->pool->alloc,
&fb_h); &fb_h);
RADV_CALL(CmdBeginRenderPass)(cmd_buffer_h, radv_CmdBeginRenderPass(cmd_buffer_h,
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = cmd_buffer->device->meta_state.fast_clear_flush.pass, .renderPass = cmd_buffer->device->meta_state.fast_clear_flush.pass,
@ -526,7 +526,7 @@ radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer,
emit_fast_clear_flush(cmd_buffer, emit_fast_clear_flush(cmd_buffer,
&(VkExtent2D) { image->extent.width, image->extent.height }, &(VkExtent2D) { image->extent.width, image->extent.height },
image->fmask.size > 0); image->fmask.size > 0);
RADV_CALL(CmdEndRenderPass)(cmd_buffer_h); radv_CmdEndRenderPass(cmd_buffer_h);
radv_DestroyFramebuffer(device_h, fb_h, radv_DestroyFramebuffer(device_h, fb_h,
&cmd_buffer->pool->alloc); &cmd_buffer->pool->alloc);

10
src/amd/vulkan/radv_meta_resolve.c
View file

@ -288,12 +288,12 @@ radv_device_finish_meta_resolve_state(struct radv_device *device)
const VkAllocationCallbacks *alloc = &device->meta_state.alloc; const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
if (pass_h) if (pass_h)
RADV_CALL(DestroyRenderPass)(device_h, pass_h, radv_DestroyRenderPass(device_h, pass_h,
&device->meta_state.alloc); &device->meta_state.alloc);
VkPipeline pipeline_h = state->resolve.pipeline; VkPipeline pipeline_h = state->resolve.pipeline;
if (pipeline_h) { if (pipeline_h) {
RADV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc); radv_DestroyPipeline(device_h, pipeline_h, alloc);
} }
} }
@ -398,7 +398,7 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer,
pipeline_h); pipeline_h);
} }
RADV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
si_emit_cache_flush(cmd_buffer); si_emit_cache_flush(cmd_buffer);
} }
@ -564,7 +564,7 @@ void radv_CmdResolveImage(
&cmd_buffer->pool->alloc, &cmd_buffer->pool->alloc,
&fb_h); &fb_h);
RADV_CALL(CmdBeginRenderPass)(cmd_buffer_h, radv_CmdBeginRenderPass(cmd_buffer_h,
&(VkRenderPassBeginInfo) { &(VkRenderPassBeginInfo) {
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
.renderPass = device->meta_state.resolve.pass, .renderPass = device->meta_state.resolve.pass,
@ -598,7 +598,7 @@ void radv_CmdResolveImage(
.height = extent.height, .height = extent.height,
}); });
RADV_CALL(CmdEndRenderPass)(cmd_buffer_h); radv_CmdEndRenderPass(cmd_buffer_h);
radv_DestroyFramebuffer(device_h, fb_h, radv_DestroyFramebuffer(device_h, fb_h,
&cmd_buffer->pool->alloc); &cmd_buffer->pool->alloc);

8
src/amd/vulkan/radv_private.h
View file

@ -308,14 +308,6 @@ void *radv_lookup_entrypoint(const char *name);
extern struct radv_dispatch_table dtable; extern struct radv_dispatch_table dtable;
#define RADV_CALL(func) ({ \
if (dtable.func == NULL) { \
size_t idx = offsetof(struct radv_dispatch_table, func) / sizeof(void *); \
dtable.entrypoints[idx] = radv_resolve_entrypoint(idx); \
} \
dtable.func; \
})
static inline void * static inline void *
radv_alloc(const VkAllocationCallbacks *alloc, radv_alloc(const VkAllocationCallbacks *alloc,
size_t size, size_t align, size_t size, size_t align,