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R3/4/5: fix TCL on r5xx, cleanup PVS code

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This commit is contained in:
Alex Deucher 2008-05-02 13:56:56 -04:00
parent 25d9f2dd24
commit 1226aba119
5 changed files with 73 additions and 54 deletions
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32
src/mesa/drivers/dri/r300/r300_cmdbuf.c
View file

@ -333,7 +333,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.vir[1].cmd[R300_VIR_CMD_0] =
cmdpacket0(R300_VAP_PROG_STREAM_CNTL_EXT_0, 1);
ALLOC_STATE(vic, always, R300_VIC_CMDSIZE, 0);
r300->hw.vic.cmd[R300_VIC_CMD_0] = cmdpacket0(R300_VAP_INPUT_CNTL_0, 2);
r300->hw.vic.cmd[R300_VIC_CMD_0] = cmdpacket0(R300_VAP_VTX_STATE_CNTL, 2);
ALLOC_STATE(vap_psc_sgn_norm_cntl, always, 2, 0);
r300->hw.vap_psc_sgn_norm_cntl.cmd[0] = cmdpacket0(R300_VAP_PSC_SGN_NORM_CNTL, SGN_NORM_ZERO_CLAMP_MINUS_ONE);
@ -481,27 +481,35 @@ void r300InitCmdBuf(r300ContextPtr r300)
int i;
ALLOC_STATE(vpi, vpu, R300_VPI_CMDSIZE, 0);
r300->hw.vpi.cmd[R300_VPI_CMD_0] =
cmdvpu(R300_PVS_UPLOAD_PROGRAM, 0);
ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
r300->hw.vpp.cmd[R300_VPP_CMD_0] =
cmdvpu(R300_PVS_UPLOAD_PARAMETERS, 0);
ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
r300->hw.vps.cmd[R300_VPS_CMD_0] =
cmdvpu(R300_PVS_UPLOAD_POINTSIZE, 1);
cmdvpu(R300_PVS_CODE_START, 0);
if (is_r500) {
ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
r300->hw.vpp.cmd[R300_VPP_CMD_0] =
cmdvpu(R500_PVS_CONST_START, 0);
ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
r300->hw.vps.cmd[R300_VPS_CMD_0] =
cmdvpu(R500_POINT_VPORT_SCALE_OFFSET, 1);
for (i = 0; i < 6; i++) {
ALLOC_STATE(vpucp[i], vpu, R300_VPUCP_CMDSIZE, 0);
r300->hw.vpucp[i].cmd[R300_VPUCP_CMD_0] =
cmdvpu(R500_PVS_UPLOAD_CLIP_PLANE0+i, 1);
cmdvpu(R500_PVS_UCP_START + i, 1);
}
} else {
ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
r300->hw.vpp.cmd[R300_VPP_CMD_0] =
cmdvpu(R300_PVS_CONST_START, 0);
ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
r300->hw.vps.cmd[R300_VPS_CMD_0] =
cmdvpu(R300_POINT_VPORT_SCALE_OFFSET, 1);
for (i = 0; i < 6; i++) {
ALLOC_STATE(vpucp[i], vpu, R300_VPUCP_CMDSIZE, 0);
r300->hw.vpucp[i].cmd[R300_VPUCP_CMD_0] =
cmdvpu(R300_PVS_UPLOAD_CLIP_PLANE0+i, 1);
cmdvpu(R300_PVS_UCP_START + i, 1);
}
}
}

4
src/mesa/drivers/dri/r300/r300_ioctl.c
View file

@ -236,8 +236,8 @@ static void r300EmitClearState(GLcontext * ctx)
/* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */
R300_STATECHANGE(r300, vic);
reg_start(R300_VAP_INPUT_CNTL_0, 1);
e32(R300_INPUT_CNTL_0_COLOR);
reg_start(R300_VAP_VTX_STATE_CNTL, 1);
e32((R300_SEL_USER_COLOR_0 << R300_COLOR_0_ASSEMBLY_SHIFT));
e32(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0);
R300_STATECHANGE(r300, vte);

77
src/mesa/drivers/dri/r300/r300_reg.h
View file

@ -139,17 +139,16 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_VAP_OUTPUT_VTX_FMT_1__4_COMPONENTS 4
#define R300_SE_VTE_CNTL 0x20b0
# define R300_VPORT_X_SCALE_ENA 0x00000001
# define R300_VPORT_X_OFFSET_ENA 0x00000002
# define R300_VPORT_Y_SCALE_ENA 0x00000004
# define R300_VPORT_Y_OFFSET_ENA 0x00000008
# define R300_VPORT_Z_SCALE_ENA 0x00000010
# define R300_VPORT_Z_OFFSET_ENA 0x00000020
# define R300_VTX_XY_FMT 0x00000100
# define R300_VTX_Z_FMT 0x00000200
# define R300_VTX_W0_FMT 0x00000400
# define R300_VTX_W0_NORMALIZE 0x00000800
# define R300_VTX_ST_DENORMALIZED 0x00001000
# define R300_VPORT_X_SCALE_ENA (1 << 0)
# define R300_VPORT_X_OFFSET_ENA (1 << 1)
# define R300_VPORT_Y_SCALE_ENA (1 << 2)
# define R300_VPORT_Y_OFFSET_ENA (1 << 3)
# define R300_VPORT_Z_SCALE_ENA (1 << 4)
# define R300_VPORT_Z_OFFSET_ENA (1 << 5)
# define R300_VTX_XY_FMT (1 << 8)
# define R300_VTX_Z_FMT (1 << 9)
# define R300_VTX_W0_FMT (1 << 10)
# define R300_SERIAL_PROC_ENA (1 << 11)
/* BEGIN: Vertex data assembly - lots of uncertainties */
@ -250,9 +249,26 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
* if vertex program uses only position, fglrx will set normal, too
* - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal.
*/
#define R300_VAP_INPUT_CNTL_0 0x2180
# define R300_INPUT_CNTL_0_COLOR 0x00000001
#define R300_VAP_INPUT_CNTL_1 0x2184
#define R300_VAP_VTX_STATE_CNTL 0x2180
# define R300_COLOR_0_ASSEMBLY_SHIFT 0
# define R300_SEL_COLOR 0
# define R300_SEL_USER_COLOR_0 1
# define R300_SEL_USER_COLOR_1 2
# define R300_COLOR_1_ASSEMBLY_SHIFT 2
# define R300_COLOR_2_ASSEMBLY_SHIFT 4
# define R300_COLOR_3_ASSEMBLY_SHIFT 6
# define R300_COLOR_4_ASSEMBLY_SHIFT 8
# define R300_COLOR_5_ASSEMBLY_SHIFT 10
# define R300_COLOR_6_ASSEMBLY_SHIFT 12
# define R300_COLOR_7_ASSEMBLY_SHIFT 14
# define R300_UPDATE_USER_COLOR_0_ENA (1 << 16)
/*
* Each bit in this field applies to the corresponding vector in the VSM
* memory (i.e. Bit 0 applies to VECTOR_0 (POSITION), etc.). If the bit
* is set, then the corresponding 4-Dword Vector is output into the Vertex Stream.
*/
#define R300_VAP_VSM_VTX_ASSM 0x2184
# define R300_INPUT_CNTL_POS 0x00000001
# define R300_INPUT_CNTL_NORMAL 0x00000002
# define R300_INPUT_CNTL_COLOR 0x00000004
@ -345,25 +361,20 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
* Multiple vertex programs and parameter sets can be loaded at once,
* which could explain the size discrepancy.
*/
#define R300_VAP_PVS_UPLOAD_ADDRESS 0x2200
# define R300_PVS_UPLOAD_PROGRAM 0x00000000
/* gap */
# define R300_PVS_UPLOAD_PARAMETERS 0x00000200
/* gap */
# define R300_PVS_UPLOAD_CLIP_PLANE0 0x00000400
# define R300_PVS_UPLOAD_CLIP_PLANE1 0x00000401
# define R300_PVS_UPLOAD_CLIP_PLANE2 0x00000402
# define R300_PVS_UPLOAD_CLIP_PLANE3 0x00000403
# define R300_PVS_UPLOAD_CLIP_PLANE4 0x00000404
# define R300_PVS_UPLOAD_CLIP_PLANE5 0x00000405
# define R300_PVS_UPLOAD_POINTSIZE 0x00000406
# define R500_PVS_UPLOAD_CLIP_PLANE0 0x00000600
# define R500_PVS_UPLOAD_CLIP_PLANE1 0x00000601
# define R500_PVS_UPLOAD_CLIP_PLANE2 0x00000602
# define R500_PVS_UPLOAD_CLIP_PLANE3 0x00000603
# define R500_PVS_UPLOAD_CLIP_PLANE4 0x00000604
# define R500_PVS_UPLOAD_CLIP_PLANE5 0x00000605
#define R300_VAP_PVS_VECTOR_INDX_REG 0x2200
# define R300_PVS_CODE_START 0
# define R300_MAX_PVS_CODE_LINES 256
# define R500_MAX_PVS_CODE_LINES 1024
# define R300_PVS_CONST_START 512
# define R500_PVS_CONST_START 1024
# define R300_MAX_PVS_CONST_VECS 256
# define R500_MAX_PVS_CONST_VECS 1024
# define R300_PVS_UCP_START 1024
# define R500_PVS_UCP_START 1536
# define R300_POINT_VPORT_SCALE_OFFSET 1030
# define R500_POINT_VPORT_SCALE_OFFSET 1542
# define R300_POINT_GEN_TEX_OFFSET 1031
# define R500_POINT_GEN_TEX_OFFSET 1543
/*
* These are obsolete defines form r300_context.h, but they might give some

4
src/mesa/drivers/dri/r300/r300_state.c
View file

@ -1802,7 +1802,7 @@ static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa)
prog->program.length = program_end;
r300SetupVertexProgramFragment(rmesa, R300_PVS_UPLOAD_PROGRAM,
r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START,
&(prog->program));
inst_count = (prog->program.length / 4) - 1;
@ -1837,7 +1837,7 @@ static void r300SetupRealVertexProgram(r300ContextPtr rmesa)
bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
param_count /= 4;
r300SetupVertexProgramFragment(rmesa, R300_PVS_UPLOAD_PROGRAM, &(prog->program));
r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START, &(prog->program));
inst_count = (prog->program.length / 4) - 1;
R300_STATECHANGE(rmesa, pvs);

10
src/mesa/drivers/dri/radeon/radeon_screen.c
View file

@ -711,7 +711,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_R520_710E:
case PCI_CHIP_R520_710F:
screen->chip_family = CHIP_FAMILY_R520;
//screen->chip_flags = RADEON_CHIPSET_TCL;
screen->chip_flags = RADEON_CHIPSET_TCL;
fprintf(stderr, "Warning, R520 detected, 3D HAHAHAHAHA!!.\n");
break;
@ -754,7 +754,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_RV515_7210:
case PCI_CHIP_RV515_7211:
screen->chip_family = CHIP_FAMILY_RV515;
//screen->chip_flags = RADEON_CHIPSET_TCL;
screen->chip_flags = RADEON_CHIPSET_TCL;
fprintf(stderr, "Warning, RV515 detected, 3D HAHAHAHAHA!!.\n");
break;
@ -775,7 +775,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_RV530_71DA:
case PCI_CHIP_RV530_71DE:
screen->chip_family = CHIP_FAMILY_RV530;
//screen->chip_flags = RADEON_CHIPSET_TCL;
screen->chip_flags = RADEON_CHIPSET_TCL;
fprintf(stderr, "Warning, RV530 detected, 3D HAHAHAHAHA!!.\n");
break;
@ -795,7 +795,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_R580_724F:
case PCI_CHIP_R580_7284:
screen->chip_family = CHIP_FAMILY_R580;
//screen->chip_flags = RADEON_CHIPSET_TCL;
screen->chip_flags = RADEON_CHIPSET_TCL;
fprintf(stderr, "Warning, R580 detected, 3D HAHAHAHAHA!!.\n");
break;
@ -812,7 +812,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_RV560_7293:
case PCI_CHIP_RV560_7297:
screen->chip_family = CHIP_FAMILY_RV560;
//screen->chip_flags = RADEON_CHIPSET_TCL;
screen->chip_flags = RADEON_CHIPSET_TCL;
fprintf(stderr, "Warning, RV560 detected, 3D HAHAHAHAHA!!.\n");
break;