diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h index 02819b6d153..2f0829005a7 100644 --- a/src/freedreno/ir3/ir3.h +++ b/src/freedreno/ir3/ir3.h @@ -408,6 +408,11 @@ typedef enum ir3_instruction_flags { /* a7xx, set on a nop after all cat5/cat6 */ IR3_INSTR_EOGM = BIT(23), + + /* Residency ChecK. Returns if the equivalent access would've accesssed a + * non-resident page. Only allowed for cat5 texture loads and ldib. + */ + IR3_INSTR_RCK = BIT(24), } ir3_instruction_flags; struct ir3_instruction { diff --git a/src/freedreno/ir3/ir3_lexer.l b/src/freedreno/ir3/ir3_lexer.l index 22bd21565ff..73bca2947cb 100644 --- a/src/freedreno/ir3/ir3_lexer.l +++ b/src/freedreno/ir3/ir3_lexer.l @@ -493,6 +493,7 @@ static int parse_reg(const char *str) "k" return 'k'; "u" return 'u'; "v" return 'v'; +"rck" return T_RCK; "base"[0-9]+ ir3_yylval.num = strtol(yytext+4, NULL, 10); return T_BASE; "offset"[0-9]+ ir3_yylval.num = strtol(yytext+6, NULL, 10); return T_OFFSET; "uniform" return T_UNIFORM; diff --git a/src/freedreno/ir3/ir3_parser.y b/src/freedreno/ir3/ir3_parser.y index ef2a44897ad..6b10a57d39d 100644 --- a/src/freedreno/ir3/ir3_parser.y +++ b/src/freedreno/ir3/ir3_parser.y @@ -769,6 +769,7 @@ static void print_token(FILE *file, int type, YYSTYPE value) %token T_UNIFORM %token T_NONUNIFORM %token T_IMM +%token T_RCK %token T_NAN %token T_INF @@ -1229,12 +1230,14 @@ cat5_flag: '.' T_3D { instr->flags |= IR3_INSTR_3D; } | '.' T_NONUNIFORM { instr->flags |= IR3_INSTR_NONUNIF; } | '.' T_BASE { instr->flags |= IR3_INSTR_B; instr->cat5.tex_base = $2; } | '.' T_W { instr->cat5.cluster_size = $2; } +| '.' T_RCK { instr->flags |= IR3_INSTR_RCK; } cat5_flags: | cat5_flag cat5_flags cat5_samp: T_SAMP { instr->cat5.samp = $1; } cat5_tex: T_TEX { instr->cat5.tex = $1; } cat5_type: '(' type ')' { instr->cat5.type = $2; } +| { } /* type does not exist for rck */ cat5_a1: src_a1 { instr->flags |= IR3_INSTR_A1EN; } cat5_samp_tex: src_gpr @@ -1420,10 +1423,13 @@ cat6_bindless_ibo_opc_3src: T_OP_STIB_B { new_instr(OPC_STIB); dummy_dst(); cat6_bindless_ibo_opc_3src_dst: T_OP_LDIB_B { new_instr(OPC_LDIB); } +cat6_rck: +| T_RCK '.' { instr->flags |= IR3_INSTR_RCK; } + cat6_bindless_ibo: cat6_bindless_ibo_opc_1src cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode dst_reg ',' cat6_reg_or_immed | cat6_bindless_ibo_opc_2src cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode src_reg ',' cat6_reg_or_immed ',' cat6_reg_or_immed { swap(instr->srcs[0], instr->srcs[2]); } | cat6_bindless_ibo_opc_3src cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode src_reg ',' cat6_reg_or_immed src_uoffset ',' cat6_reg_or_immed { swap(instr->srcs[0], instr->srcs[3]); } -| cat6_bindless_ibo_opc_3src_dst cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode dst_reg ',' cat6_reg_or_immed src_uoffset ',' cat6_reg_or_immed { swap(instr->srcs[0], instr->srcs[2]); swap(instr->srcs[1], instr->srcs[2]); } +| cat6_bindless_ibo_opc_3src_dst cat6_typed cat6_dim cat6_type '.' cat6_rck cat6_immed '.' cat6_bindless_mode dst_reg ',' cat6_reg_or_immed src_uoffset ',' cat6_reg_or_immed { swap(instr->srcs[0], instr->srcs[2]); swap(instr->srcs[1], instr->srcs[2]); } cat6_bindless_ldc_opc: T_OP_LDC { new_instr(OPC_LDC); } diff --git a/src/freedreno/ir3/tests/disasm.c b/src/freedreno/ir3/tests/disasm.c index 08ea74f005b..46d9cba086b 100644 --- a/src/freedreno/ir3/tests/disasm.c +++ b/src/freedreno/ir3/tests/disasm.c @@ -198,6 +198,9 @@ static const struct test { INSTR_6XX(a7000000_00000000, "tcinv"), + /* custom */ + INSTR_6XX(a0c07f04_0cc00005, "sam.rck (xyzw)r1.x, r0.z, s#6, t#6"), + /* cat6 */ INSTR_5XX(c6e60000_00010600, "ldgb.untyped.4d.u32.1 r0.x, g[0], r1.x, r0.x"), /* ldgb.a.untyped.1dtype.u32.1 r0.x, g[r1.x], r0.x, 0 */ @@ -296,6 +299,8 @@ static const struct test { INSTR_7XX(c3260002_01e1b100, "ldib.b.untyped.1d.u32.4.imm.base0 r0.z, r0.y+12, 0"), INSTR_7XX(c7661840_4de74144, "stib.b.untyped.1d.u32.1.uniform.base2 r16.x, r19.y+29, r3.x"), + INSTR_6XX(c0260d0a_0a61b180, "ldib.b.untyped.1d.u32.rck.4.nonuniform.base0 r2.z, r2.z, r1.z"), + /* dEQP-GLES31.functional.tessellation.invariance.outer_edge_symmetry.isolines_equal_spacing_ccw */ INSTR_6XX(c2c21100_04800006, "stlw.f32 l[r2.x], r0.w, 4"), INSTR_6XX(c2c20f00_01800004, "stlw.f32 l[r1.w], r0.z, 1"), diff --git a/src/freedreno/isa/ir3-cat5.xml b/src/freedreno/isa/ir3-cat5.xml index a1f34f359d0..483bc9db3c3 100644 --- a/src/freedreno/isa/ir3-cat5.xml +++ b/src/freedreno/isa/ir3-cat5.xml @@ -56,7 +56,7 @@ SOFTWARE. The "normal" case, ie. not s2en (indirect) and/or bindless - {SY}{JP}{NAME}{3D}{A}{O}{P}{SV}{1D} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SAMP}{TEX} + {SY}{JP}{NAME}{3D}{A}{O}{P}{SV}{1D}{RCK} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SAMP}{TEX} @@ -126,6 +126,7 @@ SOFTWARE. + @@ -135,7 +136,7 @@ SOFTWARE. The s2en (indirect) or bindless case - {SY}{JP}{NAME}{3D}{A}{O}{P}{SV}{S2EN}{UNIFORM}{NONUNIFORM}{BASE}{1D} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SRC3}{A1} + {SY}{JP}{NAME}{3D}{A}{O}{P}{SV}{S2EN}{UNIFORM}{NONUNIFORM}{BASE}{1D}{RCK} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SRC3}{A1} @@ -736,7 +737,7 @@ SOFTWARE. - {HAS_TYPE} + {HAS_TYPE} && {TYPE} != 7 ({TYPE}) @@ -748,7 +749,9 @@ SOFTWARE. the decoded disasm, but the type field is one of those special exceptions --> - src->cat5.type + + (src->flags & IR3_INSTR_RCK) ? 7 : src->cat5.type + @@ -868,6 +871,10 @@ SOFTWARE. ({DESC_MODE} == 4) /* CAT5_NONUNIFORM */ + + {TYPE} == 7 + + bindless/indirect src3, which can either be GPR or samp/tex diff --git a/src/freedreno/isa/ir3-cat6.xml b/src/freedreno/isa/ir3-cat6.xml index 01f205803a2..1b666a9dc69 100644 --- a/src/freedreno/isa/ir3-cat6.xml +++ b/src/freedreno/isa/ir3-cat6.xml @@ -1098,11 +1098,11 @@ SOFTWARE. - 0 extract_cat6_DESC_MODE(src) src->cat6.iim_val - 1 !!(src->flags & IR3_INSTR_B) + !!(src->flags & IR3_INSTR_RCK) src @@ -1110,6 +1110,7 @@ SOFTWARE. 00 00000 + 0 @@ -1296,7 +1297,7 @@ SOFTWARE. UAV (ie. Image/SSBO) instructions - {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {TYPE_HALF}{SRC1}, {SRC2}{OFFSET}, {SSBO} + {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}{RCK}.{TYPE_SIZE}.{MODE}{BASE} {TYPE_HALF}{SRC1}, {SRC2}{OFFSET}, {SSBO} @@ -1308,6 +1309,7 @@ SOFTWARE. 110 +