diff --git a/src/freedreno/afuc/emu-regs.c b/src/freedreno/afuc/emu-regs.c index b87a1c84156..b5577950bef 100644 --- a/src/freedreno/afuc/emu-regs.c +++ b/src/freedreno/afuc/emu-regs.c @@ -240,6 +240,11 @@ emu_get_fifo_reg(struct emu *emu, unsigned n, bool peek) return emu_get_gpu_reg(emu, read_addr); } else if (n == REG_DATA) { /* $data */ + if (emu->bootstrap_mode) { + emu->bootstrap_finished = true; + return 0; + } + do { uint32_t rem = emu->gpr_regs.val[REG_REM]; assert(rem >= 0); diff --git a/src/freedreno/afuc/emu.c b/src/freedreno/afuc/emu.c index 58a2cbcc25b..77def218e03 100644 --- a/src/freedreno/afuc/emu.c +++ b/src/freedreno/afuc/emu.c @@ -460,20 +460,23 @@ emu_step(struct emu *emu) void emu_run_bootstrap(struct emu *emu) { - EMU_CONTROL_REG(PACKET_TABLE_WRITE_ADDR); EMU_CONTROL_REG(THREAD_SYNC); emu->quiet = true; emu->run_mode = true; + emu->bootstrap_mode = true; + emu->bootstrap_finished = false; if (gpuver == 6 && emu->processor == EMU_PROC_LPAC) { /* Emulate what the SQE bootstrap routine does after launching LPAC */ emu_set_reg32(emu, &THREAD_SYNC, 1u << 0); } - while (emu_get_reg32(emu, &PACKET_TABLE_WRITE_ADDR) < 0x80) { + while (!emu->bootstrap_finished && !emu->waitin) { emu_step(emu); } + + emu->bootstrap_mode = false; } diff --git a/src/freedreno/afuc/emu.h b/src/freedreno/afuc/emu.h index 0903072929f..3bb8f44e48e 100644 --- a/src/freedreno/afuc/emu.h +++ b/src/freedreno/afuc/emu.h @@ -203,6 +203,14 @@ struct emu { /* (r)un mode, don't stop for input until next waitin: */ bool run_mode; + /* Don't prompt on a read from $data with an empty queue and instead assume + * the bootstrap routine has finished and return a dummy value while + * setting bootstrap_finished. + */ + bool bootstrap_mode; + + bool bootstrap_finished; + /* carry-bits for add/sub for addhi/subhi * TODO: this is probably in a SQE register somewhere */