From 11612d81b76056e0c410d1a66f6ad35d9896fb1f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marcin=20=C5=9Alusarz?= <marcin.slusarz@intel.com>
Date: Thu, 27 Oct 2022 10:05:17 +0200
Subject: [PATCH] intel/genxml: fix width of
 3DSTATE_TASK_CONTROL.MaximumNumberofThreadGroups

Fixes: 3567d47f3e7 ("intel/genxml: Inline the BODY structs into the instructions")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19412>
---
 src/intel/genxml/gen125.xml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/genxml/gen125.xml b/src/intel/genxml/gen125.xml
index 390e30ebeed..6d27fb84b65 100644
--- a/src/intel/genxml/gen125.xml
+++ b/src/intel/genxml/gen125.xml
@@ -3030,7 +3030,7 @@
     <field name="3D Command Opcode" start="24" end="26" type="uint" default="0" />
     <field name="Command SubType" start="27" end="28" type="uint" default="3" />
     <field name="Command Type" start="29" end="31" type="uint" default="3" />
-    <field name="Maximum Number of ThreadGroups" start="32" end="32" type="uint" />
+    <field name="Maximum Number of ThreadGroups" start="32" end="40" type="uint" />
     <field name="Thread Dispatch Priority" start="60" end="60" type="uint">
       <value name="High" value="1" />
     </field>