diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index b79b5f920a1..98419842fe4 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -56,411 +56,6 @@ si_is_compute_copy_faster(struct pipe_screen *pscreen,
    return false;
 }
 
-static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
-{
-   struct si_screen *sscreen = (struct si_screen *)pscreen;
-
-   /* Gfx8 (Polaris11) hangs, so don't enable this on Gfx8 and older chips. */
-   bool enable_sparse = sscreen->info.gfx_level >= GFX9 && sscreen->info.gfx_level < GFX12 &&
-      sscreen->info.has_sparse_vm_mappings;
-
-   switch (param) {
-   /* Supported features (boolean caps). */
-   case PIPE_CAP_ACCELERATED:
-   case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
-   case PIPE_CAP_ANISOTROPIC_FILTER:
-   case PIPE_CAP_OCCLUSION_QUERY:
-   case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
-   case PIPE_CAP_TEXTURE_SHADOW_LOD:
-   case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
-   case PIPE_CAP_BLEND_EQUATION_SEPARATE:
-   case PIPE_CAP_TEXTURE_SWIZZLE:
-   case PIPE_CAP_DEPTH_CLIP_DISABLE:
-   case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
-   case PIPE_CAP_SHADER_STENCIL_EXPORT:
-   case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
-   case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
-   case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
-   case PIPE_CAP_FS_COORD_PIXEL_CENTER_INTEGER:
-   case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
-   case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
-   case PIPE_CAP_PRIMITIVE_RESTART:
-   case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
-   case PIPE_CAP_CONDITIONAL_RENDER:
-   case PIPE_CAP_TEXTURE_BARRIER:
-   case PIPE_CAP_INDEP_BLEND_ENABLE:
-   case PIPE_CAP_INDEP_BLEND_FUNC:
-   case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
-   case PIPE_CAP_START_INSTANCE:
-   case PIPE_CAP_NPOT_TEXTURES:
-   case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
-   case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
-   case PIPE_CAP_VERTEX_COLOR_CLAMPED:
-   case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
-   case PIPE_CAP_VS_INSTANCEID:
-   case PIPE_CAP_COMPUTE:
-   case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
-   case PIPE_CAP_VS_LAYER_VIEWPORT:
-   case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
-   case PIPE_CAP_SAMPLE_SHADING:
-   case PIPE_CAP_DRAW_INDIRECT:
-   case PIPE_CAP_CLIP_HALFZ:
-   case PIPE_CAP_VS_WINDOW_SPACE_POSITION:
-   case PIPE_CAP_POLYGON_OFFSET_CLAMP:
-   case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
-   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
-   case PIPE_CAP_TGSI_TEXCOORD:
-   case PIPE_CAP_FS_FINE_DERIVATIVE:
-   case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
-   case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
-   case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
-   case PIPE_CAP_DEPTH_BOUNDS_TEST:
-   case PIPE_CAP_SAMPLER_VIEW_TARGET:
-   case PIPE_CAP_TEXTURE_QUERY_LOD:
-   case PIPE_CAP_TEXTURE_GATHER_SM5:
-   case PIPE_CAP_TEXTURE_QUERY_SAMPLES:
-   case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
-   case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
-   case PIPE_CAP_FS_POSITION_IS_SYSVAL:
-   case PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL:
-   case PIPE_CAP_INVALIDATE_BUFFER:
-   case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
-   case PIPE_CAP_QUERY_BUFFER_OBJECT:
-   case PIPE_CAP_QUERY_MEMORY_INFO:
-   case PIPE_CAP_SHADER_PACK_HALF_FLOAT:
-   case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
-   case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
-   case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
-   case PIPE_CAP_STRING_MARKER:
-   case PIPE_CAP_CULL_DISTANCE:
-   case PIPE_CAP_SHADER_ARRAY_COMPONENTS:
-   case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
-   case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
-   case PIPE_CAP_DOUBLES:
-   case PIPE_CAP_TGSI_TEX_TXF_LZ:
-   case PIPE_CAP_TES_LAYER_VIEWPORT:
-   case PIPE_CAP_BINDLESS_TEXTURE:
-   case PIPE_CAP_QUERY_TIMESTAMP:
-   case PIPE_CAP_QUERY_TIME_ELAPSED:
-   case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
-   case PIPE_CAP_MEMOBJ:
-   case PIPE_CAP_LOAD_CONSTBUF:
-   case PIPE_CAP_INT64:
-   case PIPE_CAP_SHADER_CLOCK:
-   case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
-   case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
-   case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
-   case PIPE_CAP_SHADER_BALLOT:
-   case PIPE_CAP_SHADER_GROUP_VOTE:
-   case PIPE_CAP_FBFETCH:
-   case PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK:
-   case PIPE_CAP_IMAGE_LOAD_FORMATTED:
-   case PIPE_CAP_PREFER_COMPUTE_FOR_MULTIMEDIA:
-   case PIPE_CAP_TGSI_DIV:
-   case PIPE_CAP_PACKED_UNIFORMS:
-   case PIPE_CAP_GL_SPIRV:
-   case PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL:
-   case PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE:
-   case PIPE_CAP_NO_CLIP_ON_COPY_TEX:
-   case PIPE_CAP_SHADER_ATOMIC_INT64:
-   case PIPE_CAP_FRONTEND_NOOP:
-   case PIPE_CAP_DEMOTE_TO_HELPER_INVOCATION:
-   case PIPE_CAP_PREFER_REAL_BUFFER_IN_CONSTBUF0:
-   case PIPE_CAP_COMPUTE_SHADER_DERIVATIVES:
-   case PIPE_CAP_IMAGE_ATOMIC_INC_WRAP:
-   case PIPE_CAP_IMAGE_STORE_FORMATTED:
-   case PIPE_CAP_ALLOW_DRAW_OUT_OF_ORDER:
-   case PIPE_CAP_QUERY_SO_OVERFLOW:
-   case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS:
-   case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
-   case PIPE_CAP_TEXTURE_MULTISAMPLE:
-   case PIPE_CAP_ALLOW_GLTHREAD_BUFFER_SUBDATA_OPT: /* TODO: remove if it's slow */
-   case PIPE_CAP_NULL_TEXTURES:
-   case PIPE_CAP_HAS_CONST_BW:
-   case PIPE_CAP_CL_GL_SHARING:
-   case PIPE_CAP_CALL_FINALIZE_NIR_IN_LINKER:
-      return 1;
-
-   /* Tahiti and Verde only: reduction mode is unsupported due to a bug
-    * (it might work sometimes, but that's not enough)
-    */
-   case PIPE_CAP_SAMPLER_REDUCTION_MINMAX:
-   case PIPE_CAP_SAMPLER_REDUCTION_MINMAX_ARB:
-      return !(sscreen->info.family == CHIP_TAHITI || sscreen->info.family == CHIP_VERDE);
-
-   case PIPE_CAP_TEXTURE_TRANSFER_MODES:
-      return PIPE_TEXTURE_TRANSFER_BLIT | PIPE_TEXTURE_TRANSFER_COMPUTE;
-
-   case PIPE_CAP_DRAW_VERTEX_STATE:
-      return !(sscreen->debug_flags & DBG(NO_FAST_DISPLAY_LIST));
-
-   case PIPE_CAP_SHADER_SAMPLES_IDENTICAL:
-      return sscreen->info.gfx_level < GFX11 && !(sscreen->debug_flags & DBG(NO_FMASK));
-
-   case PIPE_CAP_GLSL_ZERO_INIT:
-      return 2;
-
-   case PIPE_CAP_GENERATE_MIPMAP:
-   case PIPE_CAP_SEAMLESS_CUBE_MAP:
-   case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
-   case PIPE_CAP_CUBE_MAP_ARRAY:
-      return sscreen->info.has_3d_cube_border_color_mipmap;
-
-   case PIPE_CAP_POST_DEPTH_COVERAGE:
-      return sscreen->info.gfx_level >= GFX10;
-
-   case PIPE_CAP_GRAPHICS:
-      return sscreen->info.has_graphics;
-
-   case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
-      return !UTIL_ARCH_BIG_ENDIAN && sscreen->info.has_userptr;
-
-   case PIPE_CAP_DEVICE_PROTECTED_SURFACE:
-      return sscreen->info.has_tmz_support;
-
-   case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
-      return SI_MAP_BUFFER_ALIGNMENT;
-
-   case PIPE_CAP_MAX_VERTEX_BUFFERS:
-      return SI_MAX_ATTRIBS;
-
-   case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
-   case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
-   case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
-   case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
-   case PIPE_CAP_MAX_VERTEX_STREAMS:
-   case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
-   case PIPE_CAP_MAX_WINDOW_RECTANGLES:
-      return 4;
-
-   case PIPE_CAP_GLSL_FEATURE_LEVEL:
-   case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
-      return 460;
-
-   case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
-      /* Optimal number for good TexSubImage performance on Polaris10. */
-      return 64 * 1024 * 1024;
-
-   case PIPE_CAP_GL_BEGIN_END_BUFFER_SIZE:
-      return 4096 * 1024;
-
-   case PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT: {
-      unsigned max_texels =
-         pscreen->get_param(pscreen, PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT);
-
-      /* FYI, BUF_RSRC_WORD2.NUM_RECORDS field limit is UINT32_MAX. */
-
-      /* Gfx8 and older use the size in bytes for bounds checking, and the max element size
-       * is 16B. Gfx9 and newer use the VGPR index for bounds checking.
-       */
-      if (sscreen->info.gfx_level <= GFX8)
-         max_texels = MIN2(max_texels, UINT32_MAX / 16);
-      else
-         /* Gallium has a limitation that it can only bind UINT32_MAX bytes, not texels.
-          * TODO: Remove this after the gallium interface is changed. */
-         max_texels = MIN2(max_texels, UINT32_MAX / 16);
-
-      return max_texels;
-   }
-
-   case PIPE_CAP_MAX_CONSTANT_BUFFER_SIZE_UINT:
-   case PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT: {
-      /* Return 1/4th of the heap size as the maximum because the max size is not practically
-       * allocatable. Also, this can only return UINT32_MAX at most.
-       */
-      unsigned max_size = MIN2((sscreen->info.max_heap_size_kb * 1024ull) / 4, UINT32_MAX);
-
-      /* Allow max 512 MB to pass CTS with a 32-bit build. */
-      if (sizeof(void*) == 4)
-         max_size = MIN2(max_size, 512 * 1024 * 1024);
-
-      return max_size;
-   }
-
-   case PIPE_CAP_MAX_TEXTURE_MB:
-      /* Allow 1/4th of the heap size. */
-      return sscreen->info.max_heap_size_kb / 1024 / 4;
-
-   case PIPE_CAP_PREFER_BACK_BUFFER_REUSE:
-   case PIPE_CAP_UMA:
-   case PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF:
-      return 0;
-
-   case PIPE_CAP_PERFORMANCE_MONITOR:
-      return sscreen->info.gfx_level >= GFX7 && sscreen->info.gfx_level <= GFX10_3;
-
-   case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
-      return enable_sparse ? RADEON_SPARSE_PAGE_SIZE : 0;
-
-   case PIPE_CAP_CONTEXT_PRIORITY_MASK:
-      if (!sscreen->info.is_amdgpu)
-         return 0;
-      return PIPE_CONTEXT_PRIORITY_LOW |
-             PIPE_CONTEXT_PRIORITY_MEDIUM |
-             PIPE_CONTEXT_PRIORITY_HIGH;
-
-   case PIPE_CAP_FENCE_SIGNAL:
-      return sscreen->info.has_syncobj;
-
-   case PIPE_CAP_CONSTBUF0_FLAGS:
-      return SI_RESOURCE_FLAG_32BIT;
-
-   case PIPE_CAP_NATIVE_FENCE_FD:
-      return sscreen->info.has_fence_to_handle;
-
-   case PIPE_CAP_DRAW_PARAMETERS:
-   case PIPE_CAP_MULTI_DRAW_INDIRECT:
-   case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
-      return sscreen->has_draw_indirect_multi;
-
-   case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
-      return 30;
-
-   case PIPE_CAP_MAX_VARYINGS:
-   case PIPE_CAP_MAX_GS_INVOCATIONS:
-      return 32;
-
-   case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
-      return sscreen->info.gfx_level <= GFX8 ? PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 : 0;
-
-   /* Stream output. */
-   case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
-   case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
-      return 32 * 4;
-
-   /* Geometry shader output. */
-   case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
-      /* gfx9 has to report 256 to make piglit/gs-max-output pass.
-       * gfx8 and earlier can do 1024.
-       */
-      return 256;
-   case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
-      return 4095;
-
-   case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
-      return 2048;
-
-   /* Texturing. */
-   case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
-      /* TODO: Gfx12 supports 64K textures, but Gallium can't represent them at the moment. */
-      return sscreen->info.gfx_level >= GFX12 ? 32768 : 16384;
-   case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
-      if (!sscreen->info.has_3d_cube_border_color_mipmap)
-         return 0;
-      return sscreen->info.gfx_level >= GFX12 ? 16 : 15; /* 32K : 16K */
-   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
-      if (!sscreen->info.has_3d_cube_border_color_mipmap)
-         return 0;
-      /* This is limited by maximums that both the texture unit and layered rendering support. */
-      return sscreen->info.gfx_level >= GFX12 ? 15 : /* 16K */
-             sscreen->info.gfx_level >= GFX10 ? 14 : 12; /* 8K : 2K */
-   case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
-      /* This is limited by maximums that both the texture unit and layered rendering support. */
-      return sscreen->info.gfx_level >= GFX10 ? 8192 : 2048;
-
-   /* Sparse texture */
-   case PIPE_CAP_MAX_SPARSE_TEXTURE_SIZE:
-      return enable_sparse ?
-         si_get_param(pscreen, PIPE_CAP_MAX_TEXTURE_2D_SIZE) : 0;
-   case PIPE_CAP_MAX_SPARSE_3D_TEXTURE_SIZE:
-      return enable_sparse ?
-         (1 << (si_get_param(pscreen, PIPE_CAP_MAX_TEXTURE_3D_LEVELS) - 1)) : 0;
-   case PIPE_CAP_MAX_SPARSE_ARRAY_TEXTURE_LAYERS:
-      return enable_sparse ?
-         si_get_param(pscreen, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS) : 0;
-   case PIPE_CAP_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS:
-   case PIPE_CAP_QUERY_SPARSE_TEXTURE_RESIDENCY:
-   case PIPE_CAP_CLAMP_SPARSE_TEXTURE_LOD:
-      return enable_sparse;
-
-   /* Viewports and render targets. */
-   case PIPE_CAP_MAX_VIEWPORTS:
-      return SI_MAX_VIEWPORTS;
-   case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
-   case PIPE_CAP_RASTERIZER_SUBPIXEL_BITS:
-   case PIPE_CAP_MAX_RENDER_TARGETS:
-      return 8;
-   case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
-      return sscreen->info.has_eqaa_surface_allocator ? 2 : 0;
-
-   case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
-   case PIPE_CAP_MIN_TEXEL_OFFSET:
-      return -32;
-
-   case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
-   case PIPE_CAP_MAX_TEXEL_OFFSET:
-      return 31;
-
-   case PIPE_CAP_ENDIANNESS:
-      return PIPE_ENDIAN_LITTLE;
-
-   case PIPE_CAP_VENDOR_ID:
-      return ATI_VENDOR_ID;
-   case PIPE_CAP_DEVICE_ID:
-      return sscreen->info.pci_id;
-   case PIPE_CAP_VIDEO_MEMORY:
-      return sscreen->info.vram_size_kb >> 10;
-   case PIPE_CAP_PCI_GROUP:
-      return sscreen->info.pci.domain;
-   case PIPE_CAP_PCI_BUS:
-      return sscreen->info.pci.bus;
-   case PIPE_CAP_PCI_DEVICE:
-      return sscreen->info.pci.dev;
-   case PIPE_CAP_PCI_FUNCTION:
-      return sscreen->info.pci.func;
-
-   case PIPE_CAP_TIMER_RESOLUTION:
-      /* Conversion to nanos from cycles per millisecond */
-      return DIV_ROUND_UP(1000000, sscreen->info.clock_crystal_freq);
-
-   case PIPE_CAP_SHADER_SUBGROUP_SIZE:
-      return 64;
-   case PIPE_CAP_SHADER_SUBGROUP_SUPPORTED_STAGES:
-      return BITFIELD_MASK(PIPE_SHADER_TYPES);
-   case PIPE_CAP_SHADER_SUBGROUP_SUPPORTED_FEATURES:
-      return BITFIELD_MASK(PIPE_SHADER_SUBGROUP_NUM_FEATURES);
-   case PIPE_CAP_SHADER_SUBGROUP_QUAD_ALL_STAGES:
-      return true;
-
-   default:
-      return u_pipe_screen_get_param_defaults(pscreen, param);
-   }
-}
-
-static float si_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
-{
-   switch (param) {
-   case PIPE_CAPF_MIN_LINE_WIDTH:
-   case PIPE_CAPF_MIN_LINE_WIDTH_AA:
-      return 1; /* due to axis-aligned end caps at line width 1 */
-   case PIPE_CAPF_MIN_POINT_SIZE:
-   case PIPE_CAPF_MIN_POINT_SIZE_AA:
-   case PIPE_CAPF_POINT_SIZE_GRANULARITY:
-   case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
-      return 1.0 / 8.0; /* due to the register field precision */
-   case PIPE_CAPF_MAX_LINE_WIDTH:
-   case PIPE_CAPF_MAX_LINE_WIDTH_AA:
-      /* This depends on the quant mode, though the precise interactions
-       * are unknown. */
-      return 2048;
-   case PIPE_CAPF_MAX_POINT_SIZE:
-   case PIPE_CAPF_MAX_POINT_SIZE_AA:
-      return SI_MAX_POINT_SIZE;
-   case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
-      return 16.0f;
-   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
-      /* The hw can do 31, but this test fails if we use that:
-       *    KHR-GL46.texture_lod_bias.texture_lod_bias_all
-       */
-      return 16;
-   case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
-   case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
-   case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
-      return 0.0f;
-   }
-   return 0.0f;
-}
-
 static int si_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type shader,
                                enum pipe_shader_cap param)
 {
@@ -1513,10 +1108,8 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
    sscreen->b.get_vendor = si_get_vendor;
    sscreen->b.get_device_vendor = si_get_device_vendor;
    sscreen->b.get_screen_fd = si_get_screen_fd;
-   sscreen->b.get_param = si_get_param;
    sscreen->b.is_compute_copy_faster = si_is_compute_copy_faster;
    sscreen->b.driver_thread_add_job = si_driver_thread_add_job;
-   sscreen->b.get_paramf = si_get_paramf;
    sscreen->b.get_compute_param = si_get_compute_param;
    sscreen->b.get_timestamp = si_get_timestamp;
    sscreen->b.get_shader_param = si_get_shader_param;