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nir: Split lower_vote_eq into int/float versions
Recent nvidia hardware has a native instruction for nir_intrinsic_vote_ieq but not for nir_intrinsic_vote_feq. So, split this boolean into two so we can contol the lowering separately for each instruction. Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35778>
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7 changed files with 17 additions and 7 deletions
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@ -588,7 +588,8 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
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.lower_relative_shuffle = 1,
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.lower_rotate_to_shuffle = use_llvm,
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.lower_shuffle_to_32bit = 1,
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.lower_vote_eq = 1,
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.lower_vote_feq = 1,
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.lower_vote_ieq = 1,
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.lower_vote_bool_eq = 1,
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.lower_quad_broadcast_dynamic = 1,
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.lower_quad_broadcast_dynamic_to_const = gfx7minus,
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@ -5356,7 +5356,8 @@ typedef struct nir_lower_subgroups_options {
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uint8_t ballot_components;
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bool lower_to_scalar : 1;
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bool lower_vote_trivial : 1;
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bool lower_vote_eq : 1;
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bool lower_vote_feq : 1;
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bool lower_vote_ieq : 1;
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bool lower_vote_bool_eq : 1;
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bool lower_first_invocation_to_ballot : 1;
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bool lower_read_first_invocation : 1;
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@ -1035,7 +1035,11 @@ lower_subgroups_instr(nir_builder *b, nir_instr *instr, void *_options)
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if (options->lower_vote_bool_eq)
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return lower_vote_eq(b, intrin);
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} else {
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if (options->lower_vote_eq)
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if (intrin->intrinsic == nir_intrinsic_vote_feq &&
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options->lower_vote_feq)
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return lower_vote_eq(b, intrin);
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if (intrin->intrinsic == nir_intrinsic_vote_ieq &&
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options->lower_vote_ieq)
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return lower_vote_eq(b, intrin);
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}
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@ -888,7 +888,8 @@ ir3_nir_post_finalize(struct ir3_shader *shader)
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.ballot_bit_size = 32,
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.ballot_components = max_subgroup_size / 32,
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.lower_to_scalar = true,
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.lower_vote_eq = true,
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.lower_vote_feq = true,
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.lower_vote_ieq = true,
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.lower_vote_bool_eq = true,
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.lower_subgroup_masks = true,
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.lower_read_invocation_to_cond = true,
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@ -1646,7 +1646,8 @@ static void run_late_optimization_and_lowering_passes(struct si_nir_shader_ctx *
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.lower_relative_shuffle = true,
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.lower_rotate_to_shuffle = !nir->info.use_aco_amd,
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.lower_shuffle_to_32bit = true,
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.lower_vote_eq = true,
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.lower_vote_feq = true,
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.lower_vote_ieq = true,
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.lower_vote_bool_eq = true,
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.lower_quad_broadcast_dynamic = true,
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.lower_quad_broadcast_dynamic_to_const = sel->screen->info.gfx_level <= GFX7,
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@ -948,7 +948,8 @@ nak_postprocess_nir(nir_shader *nir,
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.ballot_bit_size = 32,
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.ballot_components = 1,
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.lower_to_scalar = true,
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.lower_vote_eq = true,
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.lower_vote_feq = true,
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.lower_vote_ieq = true,
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.lower_first_invocation_to_ballot = true,
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.lower_read_first_invocation = true,
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.lower_elect = true,
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@ -5929,7 +5929,8 @@ bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id)
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.ballot_bit_size = 32,
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.ballot_components = 1,
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.lower_to_scalar = true,
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.lower_vote_eq = true,
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.lower_vote_feq = true,
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.lower_vote_ieq = true,
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.lower_vote_bool_eq = true,
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.lower_first_invocation_to_ballot = true,
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.lower_read_first_invocation = true,
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