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rusticl: use pipe_caps access
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32955>
This commit is contained in:
Qiang Yu
Marge Bot
parent
45123ee4d5
commit
104c6b28b3
2 changed files with 37 additions and 46 deletions
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@ -64,17 +64,17 @@ pub struct DeviceCaps {
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impl DeviceCaps {
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fn new(screen: &PipeScreen) -> Self {
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let cap_timestamp = screen.param(pipe_cap::PIPE_CAP_QUERY_TIMESTAMP) != 0;
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let timer_resolution = screen.param(pipe_cap::PIPE_CAP_TIMER_RESOLUTION) as u32;
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let cap_timestamp = screen.caps().query_timestamp;
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let timer_resolution = screen.caps().timer_resolution;
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let max_write_images =
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Self::shader_param(screen, pipe_shader_cap::PIPE_SHADER_CAP_MAX_SHADER_IMAGES) as u32;
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let max_read_images =
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Self::shader_param(screen, pipe_shader_cap::PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS) as u32;
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let image_2d_size = screen.param(pipe_cap::PIPE_CAP_MAX_TEXTURE_2D_SIZE) as u32;
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let image_2d_size = screen.caps().max_texture_2d_size;
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let has_images = screen.param(pipe_cap::PIPE_CAP_TEXTURE_SAMPLER_INDEPENDENT) != 0 &&
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screen.param(pipe_cap::PIPE_CAP_IMAGE_STORE_FORMATTED) != 0 &&
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let has_images = screen.caps().texture_sampler_independent &&
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screen.caps().image_store_formatted &&
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// The minimum value is 8 if CL_DEVICE_IMAGE_SUPPORT is CL_TRUE
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max_read_images >= 8 &&
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// The minimum value is 8 if CL_DEVICE_IMAGE_SUPPORT is CL_TRUE
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@ -333,7 +333,7 @@ impl Device {
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}
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// we require formatted loads
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if self.screen.param(pipe_cap::PIPE_CAP_IMAGE_LOAD_FORMATTED) != 0 {
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if self.screen.caps().image_load_formatted {
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// "For embedded profiles devices that support reading from and writing to the same
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// image object from the same kernel instance (see CL_DEVICE_MAX_READ_WRITE_IMAGE_ARGS)
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// there is no required minimum list of supported image formats."
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@ -363,7 +363,7 @@ impl Device {
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}
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fn check_valid(screen: &PipeScreen) -> bool {
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if screen.param(pipe_cap::PIPE_CAP_COMPUTE) == 0
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if !screen.caps().compute
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|| screen.shader_param(
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pipe_shader_type::PIPE_SHADER_COMPUTE,
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pipe_shader_cap::PIPE_SHADER_CAP_SUPPORTED_IRS,
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@ -732,8 +732,7 @@ impl Device {
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1 << 26,
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min(
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self.max_mem_alloc(),
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self.screen
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.param(pipe_cap::PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT) as u64,
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self.screen.caps().max_shader_buffer_size_uint as u64,
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),
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)
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}
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@ -781,12 +780,12 @@ impl Device {
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return false;
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}
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self.screen.param(pipe_cap::PIPE_CAP_DOUBLES) == 1
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self.screen.caps().doubles
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}
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pub fn is_gl_sharing_supported(&self) -> bool {
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self.screen.param(pipe_cap::PIPE_CAP_CL_GL_SHARING) != 0
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&& self.screen.param(pipe_cap::PIPE_CAP_DMABUF) != 0
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self.screen.caps().cl_gl_sharing
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&& self.screen.caps().dmabuf != 0
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&& !self.is_device_software()
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&& self.screen.is_res_handle_supported()
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&& self.screen.device_uuid().is_some()
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@ -841,7 +840,7 @@ impl Device {
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}
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pub fn int64_supported(&self) -> bool {
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self.screen.param(pipe_cap::PIPE_CAP_INT64) == 1
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self.screen.caps().int64
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}
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pub fn global_mem_size(&self) -> cl_ulong {
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@ -860,20 +859,19 @@ impl Device {
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pub fn image_3d_size(&self) -> usize {
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if self.caps.has_images {
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1 << (self.screen.param(pipe_cap::PIPE_CAP_MAX_TEXTURE_3D_LEVELS) - 1)
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1 << (self.screen.caps().max_texture_3d_levels - 1)
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} else {
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0
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}
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}
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pub fn image_3d_supported(&self) -> bool {
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self.caps.has_images && self.screen.param(pipe_cap::PIPE_CAP_MAX_TEXTURE_3D_LEVELS) != 0
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self.caps.has_images && self.screen.caps().max_texture_3d_levels != 0
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}
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pub fn image_array_size(&self) -> usize {
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if self.caps.has_images {
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self.screen
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.param(pipe_cap::PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS) as usize
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self.screen.caps().max_texture_array_layers as usize
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} else {
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0
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}
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@ -881,8 +879,7 @@ impl Device {
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pub fn image_pitch_alignment(&self) -> cl_uint {
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if self.caps.has_images {
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self.screen
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.param(pipe_cap::PIPE_CAP_LINEAR_IMAGE_PITCH_ALIGNMENT) as u32
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self.screen.caps().linear_image_pitch_alignment
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} else {
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0
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}
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@ -890,8 +887,7 @@ impl Device {
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pub fn image_base_address_alignment(&self) -> cl_uint {
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if self.caps.has_images {
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self.screen
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.param(pipe_cap::PIPE_CAP_LINEAR_IMAGE_BASE_ADDRESS_ALIGNMENT) as u32
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self.screen.caps().linear_image_base_address_alignment
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} else {
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0
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}
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@ -909,9 +905,7 @@ impl Device {
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self.max_mem_alloc() / MAX_PIXEL_SIZE_BYTES,
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c_int::MAX as cl_ulong,
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),
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self.screen
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.param(pipe_cap::PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT)
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as cl_ulong,
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self.screen.caps().max_texel_buffer_elements_uint as cl_ulong,
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) as usize
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} else {
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0
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@ -923,8 +917,8 @@ impl Device {
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}
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pub fn little_endian(&self) -> bool {
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let endianness = self.screen.param(pipe_cap::PIPE_CAP_ENDIANNESS);
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endianness == (pipe_endian::PIPE_ENDIAN_LITTLE as i32)
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let endianness = self.screen.caps().endianness;
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endianness == pipe_endian::PIPE_ENDIAN_LITTLE
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}
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pub fn local_mem_size(&self) -> cl_ulong {
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@ -1002,10 +996,10 @@ impl Device {
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return None;
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}
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let pci_domain = self.screen.param(pipe_cap::PIPE_CAP_PCI_GROUP) as cl_uint;
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let pci_bus = self.screen.param(pipe_cap::PIPE_CAP_PCI_BUS) as cl_uint;
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let pci_device = self.screen.param(pipe_cap::PIPE_CAP_PCI_DEVICE) as cl_uint;
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let pci_function = self.screen.param(pipe_cap::PIPE_CAP_PCI_FUNCTION) as cl_uint;
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let pci_domain = self.screen.caps().pci_group as cl_uint;
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let pci_bus = self.screen.caps().pci_bus as cl_uint;
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let pci_device = self.screen.caps().pci_device as cl_uint;
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let pci_function = self.screen.caps().pci_function as cl_uint;
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Some(cl_device_pci_bus_info_khr {
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pci_domain,
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@ -1063,37 +1057,35 @@ impl Device {
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}
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pub fn svm_supported(&self) -> bool {
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self.screen.param(pipe_cap::PIPE_CAP_SYSTEM_SVM) == 1
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self.screen.caps().system_svm
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}
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pub fn unified_memory(&self) -> bool {
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self.screen.param(pipe_cap::PIPE_CAP_UMA) == 1
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self.screen.caps().uma
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}
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pub fn vendor_id(&self) -> cl_uint {
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let id = self.screen.param(pipe_cap::PIPE_CAP_VENDOR_ID);
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if id == -1 {
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let id = self.screen.caps().vendor_id;
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if id == 0xFFFFFFFF {
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return 0;
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}
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id as u32
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id
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}
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pub fn prefers_real_buffer_in_cb0(&self) -> bool {
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self.screen
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.param(pipe_cap::PIPE_CAP_PREFER_REAL_BUFFER_IN_CONSTBUF0)
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== 1
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self.screen.caps().prefer_real_buffer_in_constbuf0
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}
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pub fn shareable_shaders(&self) -> bool {
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self.screen.param(pipe_cap::PIPE_CAP_SHAREABLE_SHADERS) == 1
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self.screen.caps().shareable_shaders
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}
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pub fn images_as_deref(&self) -> bool {
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self.screen.param(pipe_cap::PIPE_CAP_NIR_IMAGES_AS_DEREF) == 1
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self.screen.caps().nir_images_as_deref
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}
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pub fn samplers_as_deref(&self) -> bool {
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self.screen.param(pipe_cap::PIPE_CAP_NIR_SAMPLERS_AS_DEREF) == 1
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self.screen.caps().nir_samplers_as_deref
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}
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pub fn helper_ctx(&self) -> impl HelperContextWrapper + '_ {
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@ -107,6 +107,10 @@ impl PipeScreen {
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unsafe { self.screen.as_ref() }
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}
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pub fn caps(&self) -> &pipe_caps {
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&self.screen().caps
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}
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pub fn create_context(self: &Arc<Self>) -> Option<PipeContext> {
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PipeContext::new(
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unsafe {
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@ -276,10 +280,6 @@ impl PipeScreen {
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}
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}
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pub fn param(&self, cap: pipe_cap) -> i32 {
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unsafe { self.screen().get_param.unwrap()(self.screen.as_ptr(), cap) }
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}
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pub fn shader_param(&self, t: pipe_shader_type, cap: pipe_shader_cap) -> i32 {
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unsafe { self.screen().get_shader_param.unwrap()(self.screen.as_ptr(), t, cap) }
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}
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@ -473,7 +473,6 @@ fn has_required_cbs(screen: *mut pipe_screen) -> bool {
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& has_required_feature!(screen, get_compiler_options)
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& has_required_feature!(screen, get_compute_param)
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& has_required_feature!(screen, get_name)
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& has_required_feature!(screen, get_param)
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& has_required_feature!(screen, get_shader_param)
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& has_required_feature!(screen, is_format_supported)
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& has_required_feature!(screen, resource_create)
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