diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index ac0f8d57cd0..c981a6279f7 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -469,6 +469,19 @@ convert_to_DPP(amd_gfx_level gfx_level, aco_ptr<Instruction>& instr, bool dpp8)
    return tmp;
 }
 
+bool
+can_use_input_modifiers(amd_gfx_level gfx_level, aco_opcode op, int idx)
+{
+   if (op == aco_opcode::v_mov_b32)
+      return gfx_level >= GFX10;
+
+   if (op == aco_opcode::v_ldexp_f16 || op == aco_opcode::v_ldexp_f32 ||
+       op == aco_opcode::v_ldexp_f64)
+      return idx == 0;
+
+   return instr_info.can_use_input_modifiers[(int)op];
+}
+
 bool
 can_use_opsel(amd_gfx_level gfx_level, aco_opcode op, int idx)
 {
diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h
index 63f25311b67..79d47417330 100644
--- a/src/amd/compiler/aco_ir.h
+++ b/src/amd/compiler/aco_ir.h
@@ -1823,6 +1823,7 @@ is_dead(const std::vector<uint16_t>& uses, const Instruction* instr)
    return !(get_sync_info(instr).semantics & (semantic_volatile | semantic_acqrel));
 }
 
+bool can_use_input_modifiers(amd_gfx_level gfx_level, aco_opcode op, int idx);
 bool can_use_opsel(amd_gfx_level gfx_level, aco_opcode op, int idx);
 bool instr_is_16bit(amd_gfx_level gfx_level, aco_opcode op);
 uint8_t get_gfx11_true16_mask(aco_opcode op);