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radv: optimize known front_face_fsign too
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Foz-DB Navi21:
Totals from 1941 (1.99% of 97581) affected shaders:
MaxWaves: 44196 -> 44612 (+0.94%); split: +0.97%, -0.03%
Instrs: 1553182 -> 1548823 (-0.28%); split: -0.36%, +0.08%
CodeSize: 8261308 -> 8261496 (+0.00%); split: -0.17%, +0.18%
VGPRs: 98488 -> 97968 (-0.53%); split: -0.56%, +0.03%
SpillSGPRs: 1288 -> 1347 (+4.58%)
Latency: 19136399 -> 19094748 (-0.22%); split: -0.38%, +0.16%
InvThroughput: 5424693 -> 5409469 (-0.28%); split: -0.32%, +0.04%
VClause: 29941 -> 29943 (+0.01%); split: -0.26%, +0.27%
SClause: 39922 -> 39972 (+0.13%); split: -1.02%, +1.14%
Copies: 109736 -> 109684 (-0.05%); split: -1.45%, +1.40%
Branches: 24523 -> 24499 (-0.10%); split: -0.12%, +0.02%
PreSGPRs: 99206 -> 99191 (-0.02%); split: -0.02%, +0.00%
PreVGPRs: 79019 -> 78240 (-0.99%); split: -1.00%, +0.02%
VALU: 1145088 -> 1140731 (-0.38%); split: -0.44%, +0.06%
SALU: 164035 -> 164077 (+0.03%); split: -0.48%, +0.51%
SMEM: 80668 -> 80658 (-0.01%)

We used to call this pass before front_face_fsign is created
but that has changed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38906>
This commit is contained in:
Georg Lehmann 2025-12-11 14:03:34 +01:00 • committed by Marge Bot
parent dd05c4a566
commit 0fe8250bf4
1 changed files with 7 additions and 1 deletions
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6
src/amd/vulkan/nir/radv_nir_opt_fs_builtins.c
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@ -23,6 +23,12 @@ pass(nir_builder *b, nir_intrinsic_instr *intr, void *data)
} else if (gfx_state->rs.cull_mode == VK_CULL_MODE_BACK_BIT) { } else if (gfx_state->rs.cull_mode == VK_CULL_MODE_BACK_BIT) {
replacement = nir_imm_true(b); replacement = nir_imm_true(b);
} }
} else if (intr->intrinsic == nir_intrinsic_load_front_face_fsign) {
if (gfx_state->rs.cull_mode == VK_CULL_MODE_FRONT_BIT) {
replacement = nir_imm_float(b, 1.0);
} else if (gfx_state->rs.cull_mode == VK_CULL_MODE_BACK_BIT) {
replacement = nir_imm_float(b, -1.0);
}
} else if (intr->intrinsic == nir_intrinsic_load_sample_id) { } else if (intr->intrinsic == nir_intrinsic_load_sample_id) {
if (!gfx_state->dynamic_rasterization_samples && gfx_state->ms.rasterization_samples == 0) { if (!gfx_state->dynamic_rasterization_samples && gfx_state->ms.rasterization_samples == 0) {
replacement = nir_imm_intN_t(b, 0, intr->def.bit_size); replacement = nir_imm_intN_t(b, 0, intr->def.bit_size);