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i965/fs: Split fs_visitor::register_coalesce() into its own file.
The function has gotten large, and brw_fs.cpp is the largest source file in the driver. Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
This commit is contained in:
Matt Turner
parent
8b1ab5c93b
commit
0fbcdec2f6
3 changed files with 209 additions and 181 deletions
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@ -63,6 +63,7 @@ i965_FILES = \
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brw_fs_live_variables.cpp \
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brw_fs_live_variables.cpp \
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brw_fs_peephole_predicated_break.cpp \
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brw_fs_peephole_predicated_break.cpp \
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brw_fs_reg_allocate.cpp \
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brw_fs_reg_allocate.cpp \
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brw_fs_register_coalesce.cpp \
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brw_fs_saturate_propagation.cpp \
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brw_fs_saturate_propagation.cpp \
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brw_fs_sel_peephole.cpp \
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brw_fs_sel_peephole.cpp \
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brw_fs_vector_splitting.cpp \
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brw_fs_vector_splitting.cpp \
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@ -2287,187 +2287,6 @@ fs_visitor::dead_code_eliminate_local()
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return progress;
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return progress;
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}
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}
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/**
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* Implements register coalescing: Checks if the two registers involved in a
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* raw move don't interfere, in which case they can both be stored in the same
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* place and the MOV removed.
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*
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* To do this, all uses of the source of the MOV in the shader are replaced
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* with the destination of the MOV. For example:
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*
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* add vgrf3:F, vgrf1:F, vgrf2:F
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* mov vgrf4:F, vgrf3:F
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* mul vgrf5:F, vgrf5:F, vgrf4:F
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*
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* becomes
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*
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* add vgrf4:F, vgrf1:F, vgrf2:F
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* mul vgrf5:F, vgrf5:F, vgrf4:F
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*/
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bool
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fs_visitor::register_coalesce()
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{
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bool progress = false;
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calculate_live_intervals();
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int src_size = 0;
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int channels_remaining = 0;
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int reg_from = -1, reg_to = -1;
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int reg_to_offset[MAX_SAMPLER_MESSAGE_SIZE];
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fs_inst *mov[MAX_SAMPLER_MESSAGE_SIZE];
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foreach_list(node, &this->instructions) {
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fs_inst *inst = (fs_inst *)node;
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if (inst->opcode != BRW_OPCODE_MOV ||
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inst->is_partial_write() ||
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inst->saturate ||
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inst->src[0].file != GRF ||
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inst->src[0].negate ||
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inst->src[0].abs ||
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!inst->src[0].is_contiguous() ||
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inst->dst.file != GRF ||
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inst->dst.type != inst->src[0].type) {
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continue;
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}
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if (virtual_grf_sizes[inst->src[0].reg] >
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virtual_grf_sizes[inst->dst.reg])
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continue;
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int var_from = live_intervals->var_from_reg(&inst->src[0]);
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int var_to = live_intervals->var_from_reg(&inst->dst);
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if (live_intervals->vars_interfere(var_from, var_to) &&
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!inst->dst.equals(inst->src[0])) {
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/* We know that the live ranges of A (var_from) and B (var_to)
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* interfere because of the ->vars_interfere() call above. If the end
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* of B's live range is after the end of A's range, then we know two
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* things:
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* - the start of B's live range must be in A's live range (since we
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* already know the two ranges interfere, this is the only remaining
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* possibility)
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* - the interference isn't of the form we're looking for (where B is
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* entirely inside A)
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*/
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if (live_intervals->end[var_to] > live_intervals->end[var_from])
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continue;
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bool overwritten = false;
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int scan_ip = -1;
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foreach_list(n, &this->instructions) {
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fs_inst *scan_inst = (fs_inst *)n;
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scan_ip++;
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if (scan_inst->is_control_flow()) {
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overwritten = true;
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break;
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}
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if (scan_ip <= live_intervals->start[var_to])
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continue;
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if (scan_ip > live_intervals->end[var_to])
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break;
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if (scan_inst->dst.equals(inst->dst) ||
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scan_inst->dst.equals(inst->src[0])) {
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overwritten = true;
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break;
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}
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}
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if (overwritten)
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continue;
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}
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if (reg_from != inst->src[0].reg) {
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reg_from = inst->src[0].reg;
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src_size = virtual_grf_sizes[inst->src[0].reg];
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assert(src_size <= MAX_SAMPLER_MESSAGE_SIZE);
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channels_remaining = src_size;
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memset(mov, 0, sizeof(mov));
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reg_to = inst->dst.reg;
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}
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if (reg_to != inst->dst.reg)
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continue;
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const int offset = inst->src[0].reg_offset;
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reg_to_offset[offset] = inst->dst.reg_offset;
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mov[offset] = inst;
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channels_remaining--;
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if (channels_remaining)
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continue;
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bool removed = false;
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for (int i = 0; i < src_size; i++) {
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if (mov[i]) {
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removed = true;
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mov[i]->opcode = BRW_OPCODE_NOP;
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mov[i]->conditional_mod = BRW_CONDITIONAL_NONE;
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mov[i]->dst = reg_undef;
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mov[i]->src[0] = reg_undef;
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mov[i]->src[1] = reg_undef;
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mov[i]->src[2] = reg_undef;
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}
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}
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foreach_list(node, &this->instructions) {
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fs_inst *scan_inst = (fs_inst *)node;
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for (int i = 0; i < src_size; i++) {
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if (mov[i]) {
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if (scan_inst->dst.file == GRF &&
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scan_inst->dst.reg == reg_from &&
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scan_inst->dst.reg_offset == i) {
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scan_inst->dst.reg = reg_to;
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scan_inst->dst.reg_offset = reg_to_offset[i];
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}
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for (int j = 0; j < 3; j++) {
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if (scan_inst->src[j].file == GRF &&
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scan_inst->src[j].reg == reg_from &&
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scan_inst->src[j].reg_offset == i) {
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scan_inst->src[j].reg = reg_to;
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scan_inst->src[j].reg_offset = reg_to_offset[i];
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}
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}
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}
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}
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}
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if (removed) {
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live_intervals->start[var_to] = MIN2(live_intervals->start[var_to],
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live_intervals->start[var_from]);
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live_intervals->end[var_to] = MAX2(live_intervals->end[var_to],
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live_intervals->end[var_from]);
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reg_from = -1;
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}
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}
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foreach_list_safe(node, &this->instructions) {
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fs_inst *inst = (fs_inst *)node;
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if (inst->opcode == BRW_OPCODE_NOP) {
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inst->remove();
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progress = true;
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}
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}
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if (progress)
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invalidate_live_intervals();
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return progress;
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}
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bool
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bool
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fs_visitor::compute_to_mrf()
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fs_visitor::compute_to_mrf()
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{
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{
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208
src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
Normal file
208
src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
Normal file
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@ -0,0 +1,208 @@
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/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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/** @file brw_fs_register_coalesce.cpp
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*
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* Implements register coalescing: Checks if the two registers involved in a
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* raw move don't interfere, in which case they can both be stored in the same
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* place and the MOV removed.
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*
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* To do this, all uses of the source of the MOV in the shader are replaced
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* with the destination of the MOV. For example:
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*
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* add vgrf3:F, vgrf1:F, vgrf2:F
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* mov vgrf4:F, vgrf3:F
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* mul vgrf5:F, vgrf5:F, vgrf4:F
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*
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* becomes
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*
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* add vgrf4:F, vgrf1:F, vgrf2:F
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* mul vgrf5:F, vgrf5:F, vgrf4:F
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*/
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#include "brw_fs.h"
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#include "brw_fs_live_variables.h"
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bool
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fs_visitor::register_coalesce()
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{
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bool progress = false;
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calculate_live_intervals();
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int src_size = 0;
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int channels_remaining = 0;
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int reg_from = -1, reg_to = -1;
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int reg_to_offset[MAX_SAMPLER_MESSAGE_SIZE];
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fs_inst *mov[MAX_SAMPLER_MESSAGE_SIZE];
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foreach_list(node, &this->instructions) {
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fs_inst *inst = (fs_inst *)node;
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if (inst->opcode != BRW_OPCODE_MOV ||
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inst->is_partial_write() ||
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inst->saturate ||
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inst->src[0].file != GRF ||
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inst->src[0].negate ||
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inst->src[0].abs ||
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!inst->src[0].is_contiguous() ||
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inst->dst.file != GRF ||
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inst->dst.type != inst->src[0].type) {
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continue;
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}
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if (virtual_grf_sizes[inst->src[0].reg] >
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virtual_grf_sizes[inst->dst.reg])
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continue;
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int var_from = live_intervals->var_from_reg(&inst->src[0]);
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int var_to = live_intervals->var_from_reg(&inst->dst);
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if (live_intervals->vars_interfere(var_from, var_to) &&
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!inst->dst.equals(inst->src[0])) {
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/* We know that the live ranges of A (var_from) and B (var_to)
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* interfere because of the ->vars_interfere() call above. If the end
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* of B's live range is after the end of A's range, then we know two
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* things:
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* - the start of B's live range must be in A's live range (since we
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* already know the two ranges interfere, this is the only remaining
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* possibility)
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* - the interference isn't of the form we're looking for (where B is
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* entirely inside A)
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*/
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if (live_intervals->end[var_to] > live_intervals->end[var_from])
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continue;
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bool overwritten = false;
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int scan_ip = -1;
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foreach_list(n, &this->instructions) {
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fs_inst *scan_inst = (fs_inst *)n;
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scan_ip++;
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if (scan_inst->is_control_flow()) {
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overwritten = true;
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break;
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}
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if (scan_ip <= live_intervals->start[var_to])
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continue;
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if (scan_ip > live_intervals->end[var_to])
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break;
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if (scan_inst->dst.equals(inst->dst) ||
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scan_inst->dst.equals(inst->src[0])) {
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overwritten = true;
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break;
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}
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}
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if (overwritten)
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continue;
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}
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if (reg_from != inst->src[0].reg) {
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reg_from = inst->src[0].reg;
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src_size = virtual_grf_sizes[inst->src[0].reg];
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assert(src_size <= MAX_SAMPLER_MESSAGE_SIZE);
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channels_remaining = src_size;
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memset(mov, 0, sizeof(mov));
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reg_to = inst->dst.reg;
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}
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if (reg_to != inst->dst.reg)
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continue;
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const int offset = inst->src[0].reg_offset;
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reg_to_offset[offset] = inst->dst.reg_offset;
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mov[offset] = inst;
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channels_remaining--;
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if (channels_remaining)
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continue;
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bool removed = false;
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for (int i = 0; i < src_size; i++) {
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if (mov[i]) {
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removed = true;
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mov[i]->opcode = BRW_OPCODE_NOP;
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mov[i]->conditional_mod = BRW_CONDITIONAL_NONE;
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mov[i]->dst = reg_undef;
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mov[i]->src[0] = reg_undef;
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mov[i]->src[1] = reg_undef;
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mov[i]->src[2] = reg_undef;
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}
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}
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foreach_list(node, &this->instructions) {
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fs_inst *scan_inst = (fs_inst *)node;
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for (int i = 0; i < src_size; i++) {
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if (mov[i]) {
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if (scan_inst->dst.file == GRF &&
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scan_inst->dst.reg == reg_from &&
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scan_inst->dst.reg_offset == i) {
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scan_inst->dst.reg = reg_to;
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scan_inst->dst.reg_offset = reg_to_offset[i];
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}
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||||||
|
for (int j = 0; j < 3; j++) {
|
||||||
|
if (scan_inst->src[j].file == GRF &&
|
||||||
|
scan_inst->src[j].reg == reg_from &&
|
||||||
|
scan_inst->src[j].reg_offset == i) {
|
||||||
|
scan_inst->src[j].reg = reg_to;
|
||||||
|
scan_inst->src[j].reg_offset = reg_to_offset[i];
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (removed) {
|
||||||
|
live_intervals->start[var_to] = MIN2(live_intervals->start[var_to],
|
||||||
|
live_intervals->start[var_from]);
|
||||||
|
live_intervals->end[var_to] = MAX2(live_intervals->end[var_to],
|
||||||
|
live_intervals->end[var_from]);
|
||||||
|
reg_from = -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
foreach_list_safe(node, &this->instructions) {
|
||||||
|
fs_inst *inst = (fs_inst *)node;
|
||||||
|
|
||||||
|
if (inst->opcode == BRW_OPCODE_NOP) {
|
||||||
|
inst->remove();
|
||||||
|
progress = true;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (progress)
|
||||||
|
invalidate_live_intervals();
|
||||||
|
|
||||||
|
return progress;
|
||||||
|
}
|
||||||
Loading…
Add table
Reference in a new issue